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Searched refs:pg_pipe_res_update (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn351/
H A Ddcn351_hwseq.c46 if (!update_state->pg_pipe_res_update[PG_HUBP][i] && in dcn351_calc_blocks_to_gate()
47 !update_state->pg_pipe_res_update[PG_DPP][i]) { in dcn351_calc_blocks_to_gate()
49 update_state->pg_pipe_res_update[PG_HUBP][j] = false; in dcn351_calc_blocks_to_gate()
50 update_state->pg_pipe_res_update[PG_DPP][j] = false; in dcn351_calc_blocks_to_gate()
66 if (update_state->pg_pipe_res_update[PG_HUBP][i] && in dcn351_calc_blocks_to_ungate()
67 update_state->pg_pipe_res_update[PG_DPP][i]) { in dcn351_calc_blocks_to_ungate()
69 update_state->pg_pipe_res_update[PG_HUBP][j] = true; in dcn351_calc_blocks_to_ungate()
70 update_state->pg_pipe_res_update[PG_DPP][j] = true; in dcn351_calc_blocks_to_ungate()
109 if (update_state->pg_pipe_res_update[PG_DSC][i]) { in dcn351_hw_block_power_down()
114 if (update_state->pg_pipe_res_update[PG_HUBP][i] && in dcn351_hw_block_power_down()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c1009 update_state->pg_pipe_res_update[j][i] = true; in dcn35_calc_blocks_to_gate()
1015 update_state->pg_pipe_res_update[PG_HUBP][pipe_ctx->plane_res.hubp->inst] = false; in dcn35_calc_blocks_to_gate()
1018 update_state->pg_pipe_res_update[PG_DPP][pipe_ctx->plane_res.hubp->inst] = false; in dcn35_calc_blocks_to_gate()
1021 update_state->pg_pipe_res_update[PG_MPCC][pipe_ctx->plane_res.mpcc_inst] = false; in dcn35_calc_blocks_to_gate()
1024 update_state->pg_pipe_res_update[PG_DSC][pipe_ctx->stream_res.dsc->inst] = false; in dcn35_calc_blocks_to_gate()
1027 update_state->pg_pipe_res_update[PG_OPP][pipe_ctx->stream_res.opp->inst] = false; in dcn35_calc_blocks_to_gate()
1030 …update_state->pg_pipe_res_update[PG_DPSTREAM][pipe_ctx->stream_res.hpo_dp_stream_enc->inst] = fals… in dcn35_calc_blocks_to_gate()
1034 update_state->pg_pipe_res_update[PG_PHYSYMCLK][dc->links[i]->link_enc_hw_inst] = true; in dcn35_calc_blocks_to_gate()
1036 update_state->pg_pipe_res_update[PG_PHYSYMCLK][dc->links[i]->link_enc_hw_inst] = false; in dcn35_calc_blocks_to_gate()
1043 update_state->pg_pipe_res_update[PG_OPTC][i] = false; in dcn35_calc_blocks_to_gate()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h762 bool pg_pipe_res_update[PG_HW_PIPE_RESOURCES_NUM_ELEMENT][MAX_PIPES]; member