Searched refs:performance_level_count (Results 1 – 11 of 11) sorted by relevance
807 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()824 ps->performance_levels[ps->performance_level_count - 1].mclk; in ni_apply_state_adjust_rules()826 ps->performance_levels[ps->performance_level_count - 1].vddci; in ni_apply_state_adjust_rules()833 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()844 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()850 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()855 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()863 for (i = 1; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()868 for (i = 0; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()872 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()[all …]
2244 if (state->performance_level_count == 0) in si_populate_power_containment_values()2247 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2258 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2326 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2329 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2350 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()2972 for (i = ps->performance_level_count - 2; i >= 0; i--) { in si_apply_state_adjust_rules()2977 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()2997 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3023 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in si_apply_state_adjust_rules()[all …]
169 u16 performance_level_count; member
47 u16 performance_level_count; member
800 for (i = 0; i < ps->performance_level_count; i++) { in ci_apply_state_adjust_rules()811 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()3706 if (state->performance_level_count < 1) in ci_trim_dpm_states()3709 if (state->performance_level_count == 1) in ci_trim_dpm_states()3811 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table()3813 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_find_dpm_states_clocks_in_dpm_table()3852 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()3853 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()4754 for (i = 0; i < state->performance_level_count; i++) { in ci_get_maximum_link_speed()5426 ps->performance_level_count = index + 1; in ci_parse_pplib_clock_info()[all …]
2414 if (state->performance_level_count == 0) in si_populate_power_containment_values()2417 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2428 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2495 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2498 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2519 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()3194 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >= in ni_set_uvd_clock_before_set_eng_clock()3195 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_before_set_eng_clock()3212 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk < in ni_set_uvd_clock_after_set_eng_clock()3213 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_after_set_eng_clock()[all …]
3348 for (i = 0; i < smu7_ps->performance_level_count; i++) { in smu7_apply_state_adjust_rules()3409 [smu7_ps->performance_level_count - 1].memory_clock; in smu7_apply_state_adjust_rules()3476 for (i = 0; i < smu7_ps->performance_level_count; i++) { in smu7_apply_state_adjust_rules()3506 [smu7_ps->performance_level_count-1].memory_clock; in smu7_dpm_get_mclk()3528 [smu7_ps->performance_level_count-1].engine_clock; in smu7_dpm_get_sclk()3642 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()3645 …(smu7_power_state->performance_level_count < smum_get_mac_definition(hwmgr, SMU_MAX_LEVELS_GRAPHIC… in smu7_get_pp_table_entry_callback_func_v1()3650 (smu7_power_state->performance_level_count < in smu7_get_pp_table_entry_callback_func_v1()3670 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()3738 for (i = 0; i < ps->performance_level_count; i++) { in smu7_get_pp_table_entry_v1()[all …]
3189 [vega10_ps->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3192 (vega10_ps->performance_level_count < in vega10_get_pp_table_entry_callback_func()3198 (vega10_ps->performance_level_count < in vega10_get_pp_table_entry_callback_func()3213 [vega10_ps->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3305 if (vega10_ps->performance_level_count != 2) in vega10_apply_state_adjust_rules()3314 for (i = 0; i < vega10_ps->performance_level_count; i++) { in vega10_apply_state_adjust_rules()3422 for (i = 0; i < vega10_ps->performance_level_count; i++) { in vega10_apply_state_adjust_rules()3446 [vega10_ps->performance_level_count - 1].gfx_clock; in vega10_find_dpm_states_clocks_in_dpm_table()3448 [vega10_ps->performance_level_count - 1].mem_clock; in vega10_find_dpm_states_clocks_in_dpm_table()3566 PP_ASSERT_WITH_CODE((vega10_ps->performance_level_count >= 1), in vega10_trim_dpm_states()[all …]
82 uint16_t performance_level_count; member
109 uint16_t performance_level_count; member
126 uint16_t performance_level_count; member