Searched refs:performance_level_count (Results 1 – 7 of 7) sorted by relevance
807 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()824 ps->performance_levels[ps->performance_level_count - 1].mclk; in ni_apply_state_adjust_rules()826 ps->performance_levels[ps->performance_level_count - 1].vddci; in ni_apply_state_adjust_rules()833 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()844 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()850 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()855 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()863 for (i = 1; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()868 for (i = 0; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()872 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()[all …]
2244 if (state->performance_level_count == 0) in si_populate_power_containment_values()2247 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2258 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2326 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2329 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2350 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()2974 for (i = ps->performance_level_count - 2; i >= 0; i--) { in si_apply_state_adjust_rules()2979 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()2999 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3025 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in si_apply_state_adjust_rules()[all …]
169 u16 performance_level_count; member
47 u16 performance_level_count; member
800 for (i = 0; i < ps->performance_level_count; i++) { in ci_apply_state_adjust_rules()811 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()3708 if (state->performance_level_count < 1) in ci_trim_dpm_states()3711 if (state->performance_level_count == 1) in ci_trim_dpm_states()3813 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table()3815 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_find_dpm_states_clocks_in_dpm_table()3854 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()3855 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()4757 for (i = 0; i < state->performance_level_count; i++) { in ci_get_maximum_link_speed()5429 ps->performance_level_count = index + 1; in ci_parse_pplib_clock_info()[all …]
109 uint16_t performance_level_count; member
126 uint16_t performance_level_count; member