Searched refs:pcw (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/clk/mediatek/ |
| H A D | clk-pll.c | 49 u32 pcw, int postdiv) in __mtk_pll_recalc_rate() argument
62 vco = (u64)fin * pcw; in __mtk_pll_recalc_rate()
101 static void mtk_pll_set_rate_regs(struct mtk_clk_pll *pll, u32 pcw, in mtk_pll_set_rate_regs() argument
123 val |= pcw << pll->data->pcw_shift; in mtk_pll_set_rate_regs()
146 void mtk_pll_calc_values(struct mtk_clk_pll *pll, u32 *pcw, u32 *postdiv, in mtk_pll_calc_values() argument
180 *pcw = (u32)_pcw; in mtk_pll_calc_values()
187 u32 pcw = 0; in mtk_pll_set_rate() local
190 mtk_pll_calc_values(pll, &pcw, &postdiv, rate, parent_rate); in mtk_pll_set_rate()
191 mtk_pll_set_rate_regs(pll, pcw, postdiv); in mtk_pll_set_rate()
200 u32 pcw; in mtk_pll_recalc_rate() local
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| H A D | clk-pllfh.c | 33 u32 pcw = 0; in mtk_fhctl_set_rate() local
36 mtk_pll_calc_values(pll, &pcw, &postdiv, rate, parent_rate); in mtk_fhctl_set_rate()
38 return fh->ops->hopping(fh, pcw, postdiv); in mtk_fhctl_set_rate()
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| /linux/drivers/phy/mediatek/ |
| H A D | phy-mtk-mipi-dsi-mt8196.c | 68 u32 pcw; in mtk_mipi_tx_pll_enable() local
101 pcw = (u32)pcw_calc; in mtk_mipi_tx_pll_enable()
113 writel(pcw, base + MIPITX_PLL_CON0); in mtk_mipi_tx_pll_enable()
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| /linux/drivers/ptp/ |
| H A D | ptp_fc3.c | 458 s64 pcw; in _idtfc3_adjphase() local
472 pcw = div_s64((s64)delta * idtfc3->tdc_apll_freq * 124, NSEC_PER_SEC); in _idtfc3_adjphase()
474 put_unaligned_le64(pcw, buf); in _idtfc3_adjphase()
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