Searched refs:patched_disp_clk (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/ |
| H A D | dce120_clk_mgr.c | 91 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce12_update_clocks() local
95 patched_disp_clk = patched_disp_clk * 115 / 100; in dce12_update_clocks()
97 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce12_update_clocks()
104 patched_disp_clk = dce_adjust_dp_ref_freq_for_ss( in dce12_update_clocks()
105 clk_mgr_dce, patched_disp_clk); in dce12_update_clocks()
106 clock_voltage_req.clocks_in_khz = patched_disp_clk; in dce12_update_clocks()
107 clk_mgr_base->clks.dispclk_khz = dce112_set_clock(clk_mgr_base, patched_disp_clk); in dce12_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_clk_mgr.c | 678 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce_update_clocks() local
682 patched_disp_clk = patched_disp_clk * 115 / 100; in dce_update_clocks()
692 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce_update_clocks()
693 patched_disp_clk = dce_set_clock(clk_mgr, patched_disp_clk); in dce_update_clocks()
694 clk_mgr->clks.dispclk_khz = patched_disp_clk; in dce_update_clocks()
705 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce11_update_clocks() local
709 patched_disp_clk = patched_disp_clk * 115 / 100; in dce11_update_clocks()
719 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce11_update_clocks()
720 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr, patched_disp_clk); in dce11_update_clocks()
721 clk_mgr->clks.dispclk_khz = patched_disp_clk; in dce11_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ |
| H A D | dce60_clk_mgr.c | 126 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce60_update_clocks() local
130 patched_disp_clk = patched_disp_clk * 115 / 100; in dce60_update_clocks()
140 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce60_update_clocks()
141 patched_disp_clk = dce_set_clock(clk_mgr_base, patched_disp_clk); in dce60_update_clocks()
142 clk_mgr_base->clks.dispclk_khz = patched_disp_clk; in dce60_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
| H A D | dce112_clk_mgr.c | 197 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce112_update_clocks() local
201 patched_disp_clk = patched_disp_clk * 115 / 100; in dce112_update_clocks()
211 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce112_update_clocks()
212 patched_disp_clk = dce112_set_clock(clk_mgr_base, patched_disp_clk); in dce112_update_clocks()
213 clk_mgr_base->clks.dispclk_khz = patched_disp_clk; in dce112_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
| H A D | dce_clk_mgr.c | 403 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce_update_clocks() local
407 patched_disp_clk = patched_disp_clk * 115 / 100; in dce_update_clocks()
417 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce_update_clocks()
418 patched_disp_clk = dce_set_clock(clk_mgr_base, patched_disp_clk); in dce_update_clocks()
419 clk_mgr_base->clks.dispclk_khz = patched_disp_clk; in dce_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| H A D | dce110_clk_mgr.c | 255 int patched_disp_clk = context->bw_ctx.bw.dce.dispclk_khz; in dce11_update_clocks() local
259 patched_disp_clk = patched_disp_clk * 115 / 100; in dce11_update_clocks()
269 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce11_update_clocks()
270 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk); in dce11_update_clocks()
271 clk_mgr_base->clks.dispclk_khz = patched_disp_clk; in dce11_update_clocks()
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