Searched refs:parent_idx (Results 1 – 7 of 7) sorted by relevance
1037 u16 parent_idx; member1069 table->parent_idx = PVR_IDX_INVALID; in pvr_page_table_l1_init()1213 u16 parent_idx; member1245 table->parent_idx = PVR_IDX_INVALID; in pvr_page_table_l0_init()1492 child_table->parent_idx = op_ctx->curr_page.l2_idx; in pvr_page_table_l2_insert()1513 op_ctx->curr_page.l1_table->parent_idx); in pvr_page_table_l2_remove()1519 l2_table->entries[op_ctx->curr_page.l1_table->parent_idx] = NULL; in pvr_page_table_l2_remove()1520 op_ctx->curr_page.l1_table->parent_idx = PVR_IDX_INVALID; in pvr_page_table_l2_remove()1553 child_table->parent_idx = op_ctx->curr_page.l1_idx; in pvr_page_table_l1_insert()1575 op_ctx->curr_page.l0_table->parent_idx); in pvr_page_table_l1_remove()[all …]
83 u32 parent_idx = (readl(base + CPG_CKSCR) >> 28) & 3; in sh73a0_cpg_register_clock() local85 parent_name = of_clk_get_parent_name(np, parent_idx >> 1); in sh73a0_cpg_register_clock()86 div = (parent_idx & 1) + 1; in sh73a0_cpg_register_clock()
206 collection->parent_idx = (collection->level == 0) ? -1 : in open_collection()1141 while (collection->parent_idx != -1 && in hid_apply_multiplier_to_field()1143 collection = &hid->collection[collection->parent_idx]; in hid_apply_multiplier_to_field()1145 if (collection->parent_idx != -1 || in hid_apply_multiplier_to_field()1181 while (multiplier_collection->parent_idx != -1 && in hid_apply_multiplier()1183 multiplier_collection = &hid->collection[multiplier_collection->parent_idx]; in hid_apply_multiplier()1275 device->collection[i].parent_idx = -1; in hid_parse_collections()
2471 if (pin->pf->dplls.inputs[pin->parent_idx[i]].pin == parent) in ice_dpll_pin_get_parent_num()2483 return num < 0 ? num : pin->parent_idx[num]; in ice_dpll_pin_get_parent_idx()3290 parent = &pf->dplls.inputs[rclk->parent_idx[i]]; in ice_dpll_deinit_rclk_pin()3423 parent = &pf->dplls.inputs[pin->parent_idx[i]]; in ice_dpll_init_pin_common()3446 parent = &pf->dplls.inputs[pin->parent_idx[--i]]; in ice_dpll_init_pin_common()4280 pf->dplls.rclk.parent_idx[i] = d->base_rclk_idx + i; in ice_dpll_init_info_e825c()4371 pf->dplls.rclk.parent_idx[i] = d->base_rclk_idx + i; in ice_dpll_init_info()
1145 int parent_idx, in bcm2835_clock_choose_div_and_prate() argument1158 parent = clk_hw_get_parent_by_index(hw, parent_idx); in bcm2835_clock_choose_div_and_prate()1160 if (!(BIT(parent_idx) & data->set_rate_parent)) { in bcm2835_clock_choose_div_and_prate()
499 int parent_idx; /* device->collection */ member
1289 dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, in dpll_pin_on_pin_state_set() argument1306 parent = xa_load(&dpll_pin_xa, parent_idx); in dpll_pin_on_pin_state_set()