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Searched refs:outl (Results 1 – 25 of 114) sorted by relevance

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/linux/drivers/comedi/drivers/
H A Daddi_apci_1564.c175 outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG); in apci1564_reset()
177 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG); in apci1564_reset()
178 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG); in apci1564_reset()
181 outl(0x0, dev->iobase + APCI1564_DO_REG); in apci1564_reset()
182 outl(0x0, dev->iobase + APCI1564_DO_INT_CTRL_REG); in apci1564_reset()
188 outl(0x0, devpriv->timer + ADDI_TCW_CTRL_REG); in apci1564_reset()
189 outl(0x0, devpriv->timer + ADDI_TCW_RELOAD_REG); in apci1564_reset()
195 outl(0x0, iobase + APCI1564_COUNTER(0)); in apci1564_reset()
196 outl(0x0, iobase + APCI1564_COUNTER(1)); in apci1564_reset()
197 outl(0x0, iobase + APCI1564_COUNTER(2)); in apci1564_reset()
[all …]
H A Dme4000.c325 outl(PLX9052_INTCSR_LI2POL, devpriv->plx_regbase + PLX9052_INTCSR); in me4000_xilinx_download()
330 outl(val, devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()
346 outl(val, devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()
379 outl(val, devpriv->plx_regbase + PLX9052_CNTRL); in me4000_xilinx_download()
391 outl(ctrl, dev->iobase + ME4000_AI_CTRL_REG); in me4000_ai_reset()
394 outl(0x0, dev->iobase + ME4000_AI_CTRL_REG); in me4000_ai_reset()
404 outl(0, devpriv->plx_regbase + PLX9052_INTCSR); in me4000_reset()
409 outl(val, devpriv->plx_regbase + PLX9052_CNTRL); in me4000_reset()
411 outl(val, devpriv->plx_regbase + PLX9052_CNTRL); in me4000_reset()
415 outl(0x8000, dev->iobase + ME4000_AO_SINGLE_REG(chan)); in me4000_reset()
[all …]
H A Dadl_pci9118.c249 outl(dmabuf->hw, devpriv->iobase_a + AMCC_OP_REG_MWAR); in pci9118_amcc_setup_dma()
250 outl(dmabuf->use_size, devpriv->iobase_a + AMCC_OP_REG_MWTC); in pci9118_amcc_setup_dma()
263 outl(mcsr, devpriv->iobase_a + AMCC_OP_REG_MCSR); in pci9118_amcc_dma_ena()
277 outl(intcsr, devpriv->iobase_a + AMCC_OP_REG_INTCSR); in pci9118_amcc_int_ena()
283 outl(0, dev->iobase + PCI9118_FIFO_RESET_REG); in pci9118_ai_reset_fifo()
349 outl(devpriv->ai_ctrl, dev->iobase + PCI9118_AI_CTRL_REG); in pci9118_set_chanlist()
352 outl(2, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); in pci9118_set_chanlist()
353 outl(0, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); in pci9118_set_chanlist()
354 outl(1, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); in pci9118_set_chanlist()
362 outl(val | ssh, dev->iobase + PCI9118_AI_CHANLIST_REG); in pci9118_set_chanlist()
[all …]
H A Daddi_watchdog.c44 outl(reload, spriv->iobase + ADDI_TCW_RELOAD_REG); in addi_watchdog_insn_config()
57 outl(spriv->wdog_ctrl, spriv->iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_insn_config()
91 outl(spriv->wdog_ctrl | ADDI_TCW_CTRL_TRIG, in addi_watchdog_insn_write()
100 outl(0x0, iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_reset()
101 outl(0x0, iobase + ADDI_TCW_RELOAD_REG); in addi_watchdog_reset()
H A Daddi_apci_1032.c93 outl(0x0, dev->iobase + APCI1032_CTRL_REG); in apci1032_reset()
97 outl(0x0, dev->iobase + APCI1032_MODE1_REG); in apci1032_reset()
98 outl(0x0, dev->iobase + APCI1032_MODE2_REG); in apci1032_reset()
244 outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG); in apci1032_cos_cmd()
245 outl(devpriv->mode2, dev->iobase + APCI1032_MODE2_REG); in apci1032_cos_cmd()
246 outl(devpriv->ctrl, dev->iobase + APCI1032_CTRL_REG); in apci1032_cos_cmd()
276 outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG); in apci1032_interrupt()
284 outl(ctrl, dev->iobase + APCI1032_CTRL_REG); in apci1032_interrupt()
H A Daddi_apci_3501.c124 outl(0, dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_ao_insn_write()
127 outl(APCI3501_AO_CTRL_BIPOLAR, in apci3501_ao_insn_write()
146 outl(cfg | APCI3501_AO_DATA_VAL(val), in apci3501_ao_insn_write()
173 outl(s->state, dev->iobase + APCI3501_DO_REG); in apci3501_do_insn_bits()
281 outl(0x0, dev->iobase + APCI3501_DO_REG); in apci3501_reset()
284 outl(APCI3501_AO_CTRL_BIPOLAR, in apci3501_reset()
296 outl(val | APCI3501_AO_DATA_CHAN(chan), in apci3501_reset()
H A Daddi_apci_2032.c51 outl(s->state, dev->iobase + APCI2032_DO_REG); in apci2032_do_insn_bits()
74 outl(0x0, dev->iobase + APCI2032_INT_CTRL_REG); in apci2032_int_stop()
141 outl(enabled_isns, dev->iobase + APCI2032_INT_CTRL_REG); in apci2032_int_cmd()
183 outl(~val & 3, dev->iobase + APCI2032_INT_CTRL_REG); in apci2032_interrupt()
218 outl(0x0, dev->iobase + APCI2032_DO_REG); in apci2032_reset()
219 outl(0x0, dev->iobase + APCI2032_INT_CTRL_REG); in apci2032_reset()
H A Daddi_apci_16xx.c69 outl(s->io_bits, dev->iobase + APCI16XX_DIR_REG(s->index)); in apci16xx_insn_config()
80 outl(s->state, dev->iobase + APCI16XX_OUT_REG(s->index)); in apci16xx_dio_insn_bits()
141 outl(s->io_bits, dev->iobase + APCI16XX_DIR_REG(i)); in apci16xx_auto_attach()
/linux/arch/sh/drivers/pci/
H A Dpci-dreamcast.c69 outl(0x5a14a501, GAPSPCI_REGS+0x18); in gapspci_init()
77 outl(0x01000000, GAPSPCI_REGS+0x20); in gapspci_init()
78 outl(0x01000000, GAPSPCI_REGS+0x24); in gapspci_init()
80 outl(GAPSPCI_DMA_BASE, GAPSPCI_REGS+0x28); in gapspci_init()
81 outl(GAPSPCI_DMA_BASE+GAPSPCI_DMA_SIZE, GAPSPCI_REGS+0x2c); in gapspci_init()
83 outl(1, GAPSPCI_REGS+0x14); in gapspci_init()
84 outl(1, GAPSPCI_REGS+0x34); in gapspci_init()
88 outl(0x00000000, GAPSPCI_BBA_CONFIG+0x30); in gapspci_init()
92 outl(0x00002001, GAPSPCI_BBA_CONFIG+0x10); in gapspci_init()
93 outl(0x01000000, GAPSPCI_BBA_CONFIG+0x14); in gapspci_init()
/linux/arch/x86/pci/
H A Dearly.c14 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config()
22 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config_byte()
30 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in read_pci_config_16()
38 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config()
39 outl(val, 0xcfc); in write_pci_config()
44 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config_byte()
50 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); in write_pci_config_16()
H A Ddirect.c33 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); in pci_conf1_read()
62 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); in pci_conf1_write()
72 outl((u32)value, 0xCFC); in pci_conf1_write()
166 outl((u32)value, PCI_CONF2_ADDRESS(dev, reg)); in pci_conf2_write()
233 outl(0x80000000, 0xCF8); in pci_check_type1()
237 outl(tmp, 0xCF8); in pci_check_type1()
/linux/drivers/scsi/
H A D3w-xxxx.h254 (outl(TW_STATUS_VALID_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
256 (outl(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
258 (outl(TW_CONTROL_CLEAR_HOST_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
260 (outl(TW_CONTROL_DISABLE_INTERRUPTS, TW_CONTROL_REG_ADDR(x)))
262 (outl(TW_CONTROL_CLEAR_ATTENTION_INTERRUPT | \
266 (outl(TW_CONTROL_MASK_COMMAND_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
268 (outl(TW_CONTROL_UNMASK_COMMAND_INTERRUPT, TW_CONTROL_REG_ADDR(x)))
269 #define TW_SOFT_RESET(x) (outl(TW_CONTROL_ISSUE_SOFT_RESET | \
/linux/sound/pci/trident/
H A Dtrident_main.c115 outl(data, TRID_REG(trident, DX_ACR1_AC97_R)); in snd_trident_codec_read()
124 outl(data, TRID_REG(trident, treg)); in snd_trident_codec_read()
134 outl(data, TRID_REG(trident, SI_AC97_READ)); in snd_trident_codec_read()
215 outl(data, TRID_REG(trident, address)); in snd_trident_codec_write()
239 outl(val, TRID_REG(trident, T4D_LFO_GC_CIR)); in snd_trident_enable_eso()
264 outl(tmp, TRID_REG(trident, T4D_LFO_GC_CIR)); in snd_trident_disable_eso()
286 outl(mask, TRID_REG(trident, reg)); in snd_trident_start_voice()
310 outl(mask, TRID_REG(trident, reg)); in snd_trident_stop_voice()
473 outl(regs[0], TRID_REG(trident, CH_START + 0)); in snd_trident_write_voice_regs()
474 outl(regs[1], TRID_REG(trident, CH_START + 4)); in snd_trident_write_voice_regs()
[all …]
/linux/arch/mips/pci/
H A Dops-sni.c79 outl(val, PCIMT_CONFIG_DATA); in pcimt_write()
96 outl((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8); in pcit_set_config_address()
112 outl(inl(0xcfc) | 0xc0000000, 0xcfc); in pcit_read()
115 outl(0xffffffff, 0xcfc); in pcit_read()
153 outl(val, PCIMT_CONFIG_DATA); in pcit_write()
/linux/drivers/watchdog/
H A Dintel_oc_wdt.c65 outl(inl(INTEL_OC_WDT_CTRL_REG(oc_wdt)) | INTEL_OC_WDT_EN, in intel_oc_wdt_start()
75 outl(inl(INTEL_OC_WDT_CTRL_REG(oc_wdt)) & ~INTEL_OC_WDT_EN, in intel_oc_wdt_stop()
85 outl(inl(INTEL_OC_WDT_CTRL_REG(oc_wdt)) | INTEL_OC_WDT_RLD, in intel_oc_wdt_ping()
96 outl((inl(INTEL_OC_WDT_CTRL_REG(oc_wdt)) & ~INTEL_OC_WDT_TOV) | (t - 1), in intel_oc_wdt_set_timeout()
162 outl(val | (oc_wdt->wdd.timeout - 1), INTEL_OC_WDT_CTRL_REG(oc_wdt)); in intel_oc_wdt_setup()
H A Dnv_tco.c83 outl(val, TCO_CNT(tcobase)); in tco_timer_start()
95 outl(val, TCO_CNT(tcobase)); in tco_timer_stop()
355 outl(val, MCP51_SMI_EN(tcobase)); in nv_tco_getdevice()
392 outl(TCO_STS_RESET, TCO_STS(tcobase)); in nv_tco_init()
/linux/arch/mips/sgi-ip22/
H A Dip22-eisa.c122 outl(0x0000FFFF, EIU_PREMPT_REG); in ip22_eisa_init()
123 outl(1, EIU_QUIET_REG); in ip22_eisa_init()
124 outl(0x40f3c07F, EIU_MODE_REG); in ip22_eisa_init()
/linux/arch/sh/boards/mach-dreamcast/
H A Dirq.c71 outl(mask, emr); in disable_systemasic_irq()
83 outl(mask, emr); in enable_systemasic_irq()
92 outl((1 << EVENT_BIT(irq)), esr); in mask_ack_systemasic_irq()
/linux/arch/arm/include/asm/hardware/
H A Diomd.h174 outl (SCREEN_START + start, VDMA_START); \
175 outl (SCREEN_START + end - VDMA_XFERSIZE, VDMA_END); \
178 outl (SCREEN_START + offset, VDMA_INIT); \
/linux/sound/pci/ca0106/
H A Dca0106_main.c340 outl(regptr, emu->port + CA0106_PTR); in snd_ca0106_ptr_read()
354 outl(regptr, emu->port + CA0106_PTR); in snd_ca0106_ptr_write()
355 outl(data, emu->port + CA0106_DATA); in snd_ca0106_ptr_write()
453 outl(intr_enable, emu->port + CA0106_INTE); in snd_ca0106_intr_enable()
462 outl(intr_enable, emu->port + CA0106_INTE); in snd_ca0106_intr_disable()
782 outl(hcfg, emu->port + CA0106_HCFG); in snd_ca0106_pcm_prepare_playback()
884 outl(hcfg, emu->port + CA0106_HCFG); in snd_ca0106_pcm_prepare_capture()
1243 outl(status, chip->port + CA0106_IPR); in snd_ca0106_interrupt()
1371 outl(0, chip->port + CA0106_INTE); in ca0106_init_chip()
1483 outl(0x0, chip->port + CA0106_GPIO); in ca0106_init_chip()
[all …]
/linux/lib/
H A Diomap.c194 #define pio_write32be(val,port) outl(swab32(val),port)
225 IO_COND(addr, outl(val,port), writel(val, addr)); in iowrite32()
242 outl(val, port); in pio_write64_lo_hi()
243 outl(val >> 32, port + sizeof(u32)); in pio_write64_lo_hi()
248 outl(val >> 32, port + sizeof(u32)); in pio_write64_hi_lo()
249 outl(val, port); in pio_write64_hi_lo()
/linux/drivers/isdn/hardware/mISDN/
H A Davmfritz.c213 outl(offset, fc->addr + AVM_ISACX_INDEX); in ReadISAC_V2()
222 outl(offset, fc->addr + AVM_ISACX_INDEX); in WriteISAC_V2()
223 outl(value, fc->addr + AVM_ISACX_DATA); in WriteISAC_V2()
232 outl(off, fc->addr + AVM_ISACX_INDEX); in ReadFiFoISAC_V2()
243 outl(off, fc->addr + AVM_ISACX_INDEX); in WriteFiFoISAC_V2()
245 outl(data[i], fc->addr + AVM_ISACX_DATA); in WriteFiFoISAC_V2()
265 outl(idx, fc->addr + CHIP_INDEX); in __write_ctrl_pci()
266 outl(hdlc->ctrl.ctrl, fc->addr + CHIP_WINDOW + HDLC_STATUS); in __write_ctrl_pci()
271 outl(hdlc->ctrl.ctrl, fc->addr + (channel == 2 ? AVM_HDLC_STATUS_2 : in __write_ctrl_pciv2()
297 outl(channel == 2 ? AVM_HDLC_2 : AVM_HDLC_1, addr + CHIP_INDEX); in __read_status_pci()
[all …]
/linux/arch/alpha/kernel/
H A Dsys_takara.c43 outl(mask & 0xffff0000UL, regaddr); in takara_update_irq_hw()
129 outl(ctlreg, 0x500); in takara_init_irq()
133 outl(ctlreg, 0x500); in takara_init_irq()
/linux/drivers/gpio/
H A Dgpio-cs5535.c80 outl(val, addr); in errata_outl()
88 outl(1 << offset, chip->base + reg); in __cs5535_gpio_set()
110 outl(1 << (offset + 16), chip->base + reg); in __cs5535_gpio_clear()
194 outl(val, chip->base + offset); in cs5535_gpio_setup_event()
/linux/arch/mips/loongson2ef/lemote-2f/
H A Dreset.c64 outl(val, gpio_base + GPIOL_OUT_EN); in fl2f_shutdown()
69 outl(val, gpio_base + GPIOL_OUT_VAL); in fl2f_shutdown()

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