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Searched refs:optc (Results 1 – 25 of 36) sorted by relevance

12

/linux/drivers/gpu/drm/amd/display/dc/optc/dcn35/
H A Ddcn35_optc.c58 static void optc35_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc35_set_odm_combine() argument
61 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc35_set_odm_combine()
112 static bool optc35_enable_crtc(struct timing_generator *optc) in optc35_enable_crtc() argument
114 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc35_enable_crtc()
118 OPTC_SEG0_SRC_SEL, optc->inst); in optc35_enable_crtc()
138 static bool optc35_disable_crtc(struct timing_generator *optc) in optc35_disable_crtc() argument
140 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc35_disable_crtc()
165 optc1_clear_optc_underflow(optc); in optc35_disable_crtc()
170 static void optc35_phantom_crtc_post_enable(struct timing_generator *optc) in optc35_phantom_crtc_post_enable() argument
172 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc35_phantom_crtc_post_enable()
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H A Ddcn35_optc.h72 void dcn35_timing_generator_init(struct optc *optc1);
74 void dcn35_timing_generator_set_fgcg(struct optc *optc1, bool enable);
76 void optc35_set_drr(struct timing_generator *optc, const struct drr_params *params);
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn30/
H A Ddcn30_optc.c45 void optc3_triplebuffer_lock(struct timing_generator *optc) in optc3_triplebuffer_lock() argument
47 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc3_triplebuffer_lock()
50 OTG_MASTER_UPDATE_LOCK_SEL, optc->inst); in optc3_triplebuffer_lock()
62 TRACE_OPTC_LOCK_UNLOCK_STATE(optc1, optc->inst, true); in optc3_triplebuffer_lock()
65 void optc3_lock_doublebuffer_enable(struct timing_generator *optc) in optc3_lock_doublebuffer_enable() argument
67 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc3_lock_doublebuffer_enable()
99 TRACE_OPTC_LOCK_UNLOCK_STATE(optc1, optc->inst, true); in optc3_lock_doublebuffer_enable()
102 void optc3_lock_doublebuffer_disable(struct timing_generator *optc) in optc3_lock_doublebuffer_disable() argument
104 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc3_lock_doublebuffer_disable()
116 TRACE_OPTC_LOCK_UNLOCK_STATE(optc1, optc->inst, true); in optc3_lock_doublebuffer_disable()
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H A Ddcn30_optc.h324 void dcn30_timing_generator_init(struct optc *optc1);
326 void optc3_set_out_mux(struct timing_generator *optc, enum otg_out_mux_dest dest);
328 void optc3_lock(struct timing_generator *optc);
330 void optc3_lock_doublebuffer_enable(struct timing_generator *optc);
332 void optc3_lock_doublebuffer_disable(struct timing_generator *optc);
334 void optc3_set_drr_trigger_window(struct timing_generator *optc,
337 void optc3_triplebuffer_lock(struct timing_generator *optc);
339 void optc3_program_blank_color(struct timing_generator *optc,
342 void optc3_set_vtotal_change_limit(struct timing_generator *optc,
345 void optc3_set_dsc_config(struct timing_generator *optc,
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/linux/drivers/gpu/drm/amd/display/dc/optc/dcn20/
H A Ddcn20_optc.c48 bool optc2_enable_crtc(struct timing_generator *optc) in optc2_enable_crtc() argument
54 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc2_enable_crtc()
60 OPTC_SEG0_SRC_SEL, optc->inst); in optc2_enable_crtc()
86 void optc2_set_gsl(struct timing_generator *optc, in optc2_set_gsl() argument
89 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc2_set_gsl()
106 struct timing_generator *optc, in optc2_set_gsl_source_select() argument
110 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc2_set_gsl_source_select()
132 void optc2_set_dsc_config(struct timing_generator *optc, in optc2_set_dsc_config() argument
137 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc2_set_dsc_config()
152 void optc2_get_dsc_status(struct timing_generator *optc, in optc2_get_dsc_status() argument
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H A Ddcn20_optc.h82 void dcn20_timing_generator_init(struct optc *optc);
84 void optc2_get_last_used_drr_vtotal(struct timing_generator *optc,
87 bool optc2_enable_crtc(struct timing_generator *optc);
89 void optc2_set_gsl(struct timing_generator *optc,
92 void optc2_set_gsl_source_select(struct timing_generator *optc,
96 void optc2_set_dsc_config(struct timing_generator *optc,
101 void optc2_get_dsc_status(struct timing_generator *optc,
104 void optc2_set_odm_bypass(struct timing_generator *optc,
107 void optc2_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
110 void optc2_get_optc_source(struct timing_generator *optc,
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/linux/drivers/gpu/drm/amd/display/dc/optc/dcn32/
H A Ddcn32_optc.c45 static void optc32_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc32_set_odm_combine() argument
48 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc32_set_odm_combine()
102 struct optc *optc1 = DCN10TG_FROM_TG(tg); in optc32_get_odm_combine_segments()
126 struct optc *optc1 = DCN10TG_FROM_TG(tg); in optc32_wait_odm_doublebuffer_pending_clear()
131 void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode) in optc32_set_h_timing_div_manual_mode() argument
133 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc32_set_h_timing_div_manual_mode()
145 static bool optc32_enable_crtc(struct timing_generator *optc) in optc32_enable_crtc() argument
147 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc32_enable_crtc()
151 OPTC_SEG0_SRC_SEL, optc->inst); in optc32_enable_crtc()
171 static bool optc32_disable_crtc(struct timing_generator *optc) in optc32_disable_crtc() argument
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H A Ddcn32_optc.h182 void dcn32_timing_generator_init(struct optc *optc1);
183 void optc32_set_h_timing_div_manual_mode(struct timing_generator *optc, bool manual_mode);
185 void optc32_set_odm_bypass(struct timing_generator *optc,
188 bool optc32_get_double_buffer_pending(struct timing_generator *optc);
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn314/
H A Ddcn314_optc.c50 static void optc314_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt, in optc314_set_odm_combine() argument
53 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc314_set_odm_combine()
105 static bool optc314_enable_crtc(struct timing_generator *optc) in optc314_enable_crtc() argument
107 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc314_enable_crtc()
111 OPTC_SEG0_SRC_SEL, optc->inst); in optc314_enable_crtc()
131 static bool optc314_disable_crtc(struct timing_generator *optc) in optc314_disable_crtc() argument
133 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc314_disable_crtc()
152 static void optc314_phantom_crtc_post_enable(struct timing_generator *optc) in optc314_phantom_crtc_post_enable() argument
154 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc314_phantom_crtc_post_enable()
163 static void optc314_set_odm_bypass(struct timing_generator *optc, in optc314_set_odm_bypass() argument
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H A Ddcn314_optc.h253 void dcn314_timing_generator_init(struct optc *optc1);
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn301/
H A Ddcn301_optc.c53 struct timing_generator *optc, in optc301_set_drr() argument
56 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc301_set_drr()
74 …optc->funcs->set_vtotal_min_max(optc, params->vertical_total_min - 1, params->vertical_total_max -… in optc301_set_drr()
83 optc->funcs->setup_manual_trigger(optc); in optc301_set_drr()
92 optc->funcs->set_vtotal_min_max(optc, 0, 0); in optc301_set_drr()
97 void optc301_setup_manual_trigger(struct timing_generator *optc) in optc301_setup_manual_trigger() argument
99 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc301_setup_manual_trigger()
103 OTG_TRIGA_SOURCE_PIPE_SELECT, optc->inst, in optc301_setup_manual_trigger()
174 void dcn301_timing_generator_init(struct optc *optc1) in dcn301_timing_generator_init()
H A Ddcn301_optc.h32 void dcn301_timing_generator_init(struct optc *optc1);
33 void optc301_setup_manual_trigger(struct timing_generator *optc);
34 void optc301_set_drr(struct timing_generator *optc, const struct drr_params *params);
/linux/drivers/gpu/drm/amd/display/dc/optc/
H A DMakefile33 AMD_DAL_OPTC_DCN10 = $(addprefix $(AMDDALPATH)/dc/optc/dcn10/,$(OPTC_DCN10))
41 AMD_DAL_OPTC_DCN20 = $(addprefix $(AMDDALPATH)/dc/optc/dcn20/,$(OPTC_DCN20))
49 AMD_DAL_OPTC_DCN201 = $(addprefix $(AMDDALPATH)/dc/optc/dcn201/,$(OPTC_DCN201))
61 AMD_DAL_OPTC_DCN30 = $(addprefix $(AMDDALPATH)/dc/optc/dcn30/,$(OPTC_DCN30))
69 AMD_DAL_OPTC_DCN301 = $(addprefix $(AMDDALPATH)/dc/optc/dcn301/,$(OPTC_DCN301))
77 AMD_DAL_OPTC_DCN31 = $(addprefix $(AMDDALPATH)/dc/optc/dcn31/,$(OPTC_DCN31))
85 AMD_DAL_OPTC_DCN314 = $(addprefix $(AMDDALPATH)/dc/optc/dcn314/,$(OPTC_DCN314))
93 AMD_DAL_OPTC_DCN32 = $(addprefix $(AMDDALPATH)/dc/optc/dcn32/,$(OPTC_DCN32))
101 AMD_DAL_OPTC_DCN35 = $(addprefix $(AMDDALPATH)/dc/optc/dcn35/,$(OPTC_DCN35))
110 AMD_DAL_OPTC_DCN401 = $(addprefix $(AMDDALPATH)/dc/optc/dcn401/,$(OPTC_DCN401))
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn201/
H A Ddcn201_optc.c41 static void optc201_triplebuffer_lock(struct timing_generator *optc) in optc201_triplebuffer_lock() argument
43 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc201_triplebuffer_lock()
46 OTG_MASTER_UPDATE_LOCK_SEL, optc->inst); in optc201_triplebuffer_lock()
57 static void optc201_triplebuffer_unlock(struct timing_generator *optc) in optc201_triplebuffer_unlock() argument
59 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc201_triplebuffer_unlock()
69 struct timing_generator *optc, in optc201_validate_timing() argument
75 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc201_validate_timing()
119 static void optc201_get_optc_source(struct timing_generator *optc, in optc201_get_optc_source() argument
124 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc201_get_optc_source()
185 void dcn201_timing_generator_init(struct optc *optc1) in dcn201_timing_generator_init()
H A Ddcn201_optc.h70 void dcn201_timing_generator_init(struct optc *optc);
/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_trace.h43 #define TRACE_OPTC_LOCK_UNLOCK_STATE(optc, inst, lock) \ argument
44 trace_dcn_optc_lock_unlock_state(optc, inst, lock, __func__, __LINE__)
/linux/drivers/gpu/drm/amd/display/dc/optc/dcn31/
H A Ddcn31_optc.h259 void dcn31_timing_generator_init(struct optc *optc1);
261 bool optc31_immediate_disable_crtc(struct timing_generator *optc);
263 void optc31_set_drr(struct timing_generator *optc, const struct drr_params *params);
265 void optc3_init_odm(struct timing_generator *optc);
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c181 void optc3_fpu_set_vrr_m_const(struct timing_generator *optc, in optc3_fpu_set_vrr_m_const() argument
184 struct optc *optc1 = DCN10TG_FROM_TG(optc); in optc3_fpu_set_vrr_m_const()
213 optc->funcs->set_vtotal_min_max(optc, 0, 0); in optc3_fpu_set_vrr_m_const()
252 optc->funcs->set_vtotal_min_max(optc, vtotal_min, vtotal_max); in optc3_fpu_set_vrr_m_const()
H A Ddcn30_fpu.h32 void optc3_fpu_set_vrr_m_const(struct timing_generator *optc,
/linux/drivers/gpu/drm/amd/display/
H A DMakefile35 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dc/optc
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/
H A Ddcn316_resource.c881 .optc = true,
1051 struct optc *tgn10 = in dcn31_timing_generator_create()
1052 kzalloc(sizeof(struct optc), GFP_KERNEL); in dcn31_timing_generator_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/
H A Ddcn314_resource.c906 .optc = true,
1115 struct optc *tgn10 = in dcn31_timing_generator_create()
1116 kzalloc(sizeof(struct optc), GFP_KERNEL); in dcn31_timing_generator_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/
H A Ddcn315_resource.c886 .optc = true,
1057 struct optc *tgn10 = in dcn31_timing_generator_create()
1058 kzalloc(sizeof(struct optc), GFP_KERNEL); in dcn31_timing_generator_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/
H A Ddcn35_resource.c746 .optc = true,
1033 struct optc *tgn10 = in dcn35_timing_generator_create()
1034 kzalloc(sizeof(struct optc), GFP_KERNEL); in dcn35_timing_generator_create()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/
H A Ddcn321_resource.c712 .optc = true,
994 struct optc *tgn10 = in dcn321_timing_generator_create()
995 kzalloc(sizeof(struct optc), GFP_KERNEL); in dcn321_timing_generator_create()

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