| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | pg_cntl.h | 46 void (*opp_pg_control)(struct pg_cntl *pg_cntl, unsigned int opp_inst, bool power_on);
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| H A D | hw_shared.h | 91 int opp_inst; member
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| /linux/drivers/gpu/drm/amd/display/dc/pg/dcn35/ |
| H A D | dcn35_pg_cntl.c | 358 unsigned int opp_inst, bool power_on) in pg_cntl35_opp_pg_control() argument
363 if (opp_inst < MAX_PIPES) in pg_cntl35_opp_pg_control()
364 pg_cntl->pg_pipe_res_enable[PG_OPP][opp_inst] = power_on; in pg_cntl35_opp_pg_control()
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| H A D | dcn35_pg_cntl.h | 181 unsigned int opp_inst, bool power_on);
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 1628 struct timing_generator *tg, int opp_inst[MAX_PIPES], int opp_head_count, in hwss_add_optc_set_odm_combine()
1633 …memcpy(seq_state->steps[*seq_state->num_steps].params.set_odm_combine_params.opp_inst, opp_inst, s… in hwss_add_optc_set_odm_combine()
2159 int opp_inst; in hwss_wait_for_outstanding_hw_updates() local
2185 for (opp_inst = 0; opp_inst < opp_count; opp_inst++) { in hwss_wait_for_outstanding_hw_updates()
2186 if ((dc->res_pool->opps[opp_inst] != NULL) && in hwss_wait_for_outstanding_hw_updates()
2187 (dc->res_pool->opps[opp_inst]->mpcc_disconnect_pending[mpcc_inst])) { in hwss_wait_for_outstanding_hw_updates()
2189 dc->res_pool->opps[opp_inst]->mpcc_disconnect_pending[mpcc_inst] = false; in hwss_wait_for_outstanding_hw_updates()
2210 int *opp_inst = params->set_odm_combine_params.opp_inst; in hwss_set_odm_combine() local
2216 tg->funcs->set_odm_combine(tg, opp_inst, opp_head_count, in hwss_set_odm_combine()
2271 int opp_inst = params->dsc_enable_params.opp_inst; in hwss_dsc_enable() local
[all …]
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| H A D | dc_resource.c | 103 int dpp_inst, int opp_inst, int tg_inst, bool is_phantom_pipe) in capture_pipe_topology_data() argument
115 current_snapshot->pipe_log_lines[current_snapshot->line_count].opp_inst = opp_inst; in capture_pipe_topology_data()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 717 int *opp_inst, in enable_stream_timing_calc() argument
732 opp_inst[i] = opp_heads[i]->stream_res.opp->inst; in enable_stream_timing_calc()
762 int opp_inst[MAX_PIPES] = {0}; in dcn401_enable_stream_timing() local
775 enable_stream_timing_calc(pipe_ctx, context, dc, &tmds_div, opp_inst, in dcn401_enable_stream_timing()
791 opp_inst, opp_cnt, in dcn401_enable_stream_timing()
1564 int opp_inst[MAX_PIPES] = {0}; in dcn401_update_odm() local
1574 opp_inst[i] = opp_heads[i]->stream_res.opp->inst; in dcn401_update_odm()
1578 opp_inst, opp_head_count, in dcn401_update_odm()
1701 int opp_inst[MAX_PIPES] = {0}; in dcn401_update_odm_sequence() local
1711 opp_inst[i] = opp_heads[i]->stream_res.opp->inst; in dcn401_update_odm_sequence()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 841 int opp_inst[MAX_PIPES] = {0}; in dcn20_enable_stream_timing() local
871 opp_inst[i] = opp_heads[i]->stream_res.opp->inst; in dcn20_enable_stream_timing()
878 opp_inst, opp_cnt, odm_slice_width, in dcn20_enable_stream_timing()
941 mpc, opp_inst[i], in dcn20_enable_stream_timing()
1195 int opp_inst[MAX_PIPES] = { pipe_ctx->stream_res.opp->inst }; in dcn20_update_odm() local
1200 opp_inst[opp_cnt] = odm_pipe->stream_res.opp->inst; in dcn20_update_odm()
1207 opp_inst, opp_cnt, in dcn20_update_odm()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/ |
| H A D | hw_sequencer.h | 198 int opp_inst[MAX_PIPES]; member
234 int opp_inst; member
1649 struct timing_generator *tg, int opp_inst[MAX_PIPES], int opp_head_count,
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| /linux/drivers/gpu/drm/amd/display/dmub/inc/ |
| H A D | dmub_cmd.h | 1620 uint32_t opp_inst: 3; member
3610 uint8_t opp_inst; member
5035 uint8_t opp_inst; member
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