Searched refs:opp_cnt (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 1257 int opp_cnt = 1; in get_pixel_clock_parameters() local
1264 opp_cnt++; in get_pixel_clock_parameters()
1288 if (opp_cnt == 4) in get_pixel_clock_parameters()
1290 …else if (pipe_ctx->stream_res.tg->funcs->is_two_pixels_per_container(&stream->timing) || opp_cnt =… in get_pixel_clock_parameters()
1304 opp_cnt > 1) { in get_pixel_clock_parameters()
1691 int opp_cnt = 1; in dcn20_validate_dsc() local
1694 opp_cnt++; in dcn20_validate_dsc()
1701 + stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; in dcn20_validate_dsc()
1708 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn20_validate_dsc()
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| /linux/drivers/gpu/drm/amd/display/dc/link/ |
| H A D | link_dpms.c | 675 int opp_cnt = 1; in link_set_dsc_on_stream() local
691 opp_cnt++; in link_set_dsc_on_stream()
700 stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; in link_set_dsc_on_stream()
706 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in link_set_dsc_on_stream()
707 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in link_set_dsc_on_stream()
722 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in link_set_dsc_on_stream()
723 dsc_cfg.pic_width *= opp_cnt; in link_set_dsc_on_stream()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 616 int *opp_cnt, in enable_stream_timing_calc() argument
629 *opp_cnt = resource_get_opp_heads_for_otg_master(pipe_ctx, &context->res_ctx, opp_heads); in enable_stream_timing_calc()
630 for (i = 0; i < *opp_cnt; i++) in enable_stream_timing_calc()
660 int opp_cnt = 1; in dcn401_enable_stream_timing() local
675 &opp_cnt, opp_heads, &manual_mode, ¶ms, &event_triggers); in dcn401_enable_stream_timing()
685 if (opp_cnt > 1) { in dcn401_enable_stream_timing()
690 opp_inst, opp_cnt, in dcn401_enable_stream_timing()
736 for (i = 0; i < opp_cnt; i++) { in dcn401_enable_stream_timing()
1554 int opp_cnt = 1; in dcn401_add_dsc_sequence_for_odm_change() local
1561 opp_cnt++; in dcn401_add_dsc_sequence_for_odm_change()
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| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 2346 int opp_cnt = params->dsc_calculate_and_set_config_params.opp_cnt; in hwss_dsc_calculate_and_set_config() local
2361 stream->timing.h_border_left + stream->timing.h_border_right) / opp_cnt; in hwss_dsc_calculate_and_set_config()
2367 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in hwss_dsc_calculate_and_set_config()
3185 struct pipe_ctx *pipe_ctx, bool enable, int opp_cnt) in hwss_add_dsc_calculate_and_set_config() argument
3191 …q_state->steps[*seq_state->num_steps].params.dsc_calculate_and_set_config_params.opp_cnt = opp_cnt; in hwss_add_dsc_calculate_and_set_config()
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