| /linux/drivers/scsi/ |
| H A D | mac_esp.c | 139 #define MAC_ESP_PDMA_LOOP(operands) \ argument 143 "1: movew " operands " \n" \ 144 "2: movew " operands " \n" \ 145 "3: movew " operands " \n" \ 146 "4: movew " operands " \n" \ 147 "5: movew " operands " \n" \ 148 "6: movew " operands " \n" \ 149 "7: movew " operands " \n" \ 150 "8: movew " operands " \n" \ 151 "9: movew " operands " \n" \ [all …]
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| /linux/arch/powerpc/xmon/ |
| H A D | ppc-dis.c | 102 for (opindex = opcode->operands; *opindex != 0; opindex++) in lookup_powerpc() 158 if (opcode->operands[0] != 0) in print_insn_powerpc() 171 for (opindex = opcode->operands; *opindex != 0; opindex++) in print_insn_powerpc()
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| H A D | ppc.h | 60 unsigned char operands[8]; member 422 unsigned int operands; member
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| /linux/drivers/acpi/acpica/ |
| H A D | dsutils.c | 361 acpi_ex_resolve_to_value(&walk_state->operands[i], in acpi_ds_resolve_operands() 396 acpi_ut_remove_reference(walk_state->operands[i]); in acpi_ds_clear_operands() 397 walk_state->operands[i] = NULL; in acpi_ds_clear_operands() 686 walk_state->operands[index] = NULL; in acpi_ds_create_operands() 756 union acpi_operand_object **operand = &walk_state->operands[0]; in acpi_ds_evaluate_name_path()
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| /linux/arch/m68k/fpsp040/ |
| H A D | do_func.S | 171 bra t_operr |take care of operands < -1 189 bne t_operr |take care of operands < 0 203 bra t_operr |take care of operands < 0 211 bne t_operr |take care of operands < 0 225 bra t_operr |take care of operands < 0 233 bne t_operr |take care of operands < 0 247 bra t_operr |take care of operands < 0
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| H A D | res_func.S | 605 | of the operands must be denormalized to enter this code. 650 | if(both operands are denorm) 664 | if(both operands are denorm) 824 | Check the signs of the operands. If they are unlike, the fpu 999 | Check the signs of the operands. If they are alike, the fpu
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| H A D | decbin.S | 21 | and NaN operands are dispatched without entering this routine)
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| /linux/kernel/trace/ |
| H A D | trace_events_hist.c | 169 struct hist_field *operands[HIST_FIELD_OPERANDS_MAX]; member 288 struct hist_field *operand = hist_field->operands[0]; in hist_field_log2() 301 struct hist_field *operand = hist_field->operands[0]; in hist_field_bucket() 322 struct hist_field *operand1 = hist_field->operands[0]; in hist_field_plus() 323 struct hist_field *operand2 = hist_field->operands[1]; in hist_field_plus() 337 struct hist_field *operand1 = hist_field->operands[0]; in hist_field_minus() 338 struct hist_field *operand2 = hist_field->operands[1]; in hist_field_minus() 352 struct hist_field *operand1 = hist_field->operands[0]; in hist_field_div() 353 struct hist_field *operand2 = hist_field->operands[1]; in hist_field_div() 375 struct hist_field *operand1 = hist_field->operands[0]; in div_by_power_of_two() [all …]
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| /linux/Documentation/arch/arm/vfp/ |
| H A D | release-notes.rst | 36 when input operands differ in signs.
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| /linux/Documentation/bpf/standardization/ |
| H A D | instruction-set.rst | 318 ``ALU`` uses 32-bit wide operands while ``ALU64`` uses 64-bit wide operands for 410 ``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into 411 32-bit operands, and zeroes the remaining upper 32 bits. 413 operands into 64-bit operands. Unlike other arithmetic instructions, 414 ``MOVSX`` is only defined for register source operands (``X``). 487 ``JMP32`` uses 32-bit wide operands and indicates the base32 488 conformance group, while ``JMP`` uses 64-bit wide operands for
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| /linux/Documentation/virt/coco/ |
| H A D | tdx-guest.rst | 29 operands, -EIO on TDCALL failure or standard error number on other
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| /linux/tools/testing/selftests/x86/bugs/ |
| H A D | its_indirect_alignment.py | 118 if kcore_insn.operands[0].type == capstone.CS_OP_IMM:
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| /linux/tools/perf/util/ |
| H A D | capstone.c | 224 * Resolving address operands to symbols is implemented in capstone__fprintf_insn_asm() 240 struct cs_x86_op *op = &insn->detail->x86.operands[0]; in capstone__fprintf_insn_asm() 310 struct cs_x86_op *op = &insn->detail->x86.operands[i];
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| /linux/arch/m68k/ifpsp060/ |
| H A D | fplsp.doc | 101 addq.l &0x8,%sp # clear operands from stack 103 Again, the result is returned in fp0. Note that BOTH operands
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| /linux/Documentation/bpf/ |
| H A D | linux-notes.rst | 63 These instructions have seven implicit operands:
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| H A D | classic_vs_extended.rst | 332 exactly the same operations as BPF_ALU, but with 64-bit wide operands 342 operands for the comparisons instead.
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| /linux/Documentation/arch/arm/nwfpe/ |
| H A D | netwinder-fpe.rst | 97 operands, on the actual FPA11 hardware they do not work for double or 98 extended precision operands. The emulator currently does not check
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| /linux/arch/m68k/ifpsp060/src/ |
| H A D | ilsp.S | 84 # If the operands are signed, make them unsigned and save the # 545 # load temp registers with operands 603 # one or both of the operands is zero so the result is also zero. 671 # load temp registers with operands
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| H A D | fpsp.S | 2298 # have to make sure that for single or double source operands that the 2374 # set_tag_x() - determine optype of src/dst operands # 2376 # unnorm_fix() - change UNNORM operands to NORM or ZERO # 2948 # immediate operands but requires some extra work for fmovm dynamic 13951 # compute a result. Check if the regular operands would have taken # 14292 # compute a result. Check if the regular operands would have taken # 14608 # addsub_scaler2() - scale the operands so they won't take exc # 14958 # both operands are ZEROes 15018 # both operands are INFs. an OPERR will result if the INFs have 15031 # operands are INF and one of {ZERO, INF, DENORM, NORM} [all …]
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| H A D | pfpsp.S | 2297 # have to make sure that for single or double source operands that the 2373 # set_tag_x() - determine optype of src/dst operands # 2375 # unnorm_fix() - change UNNORM operands to NORM or ZERO # 2947 # immediate operands but requires some extra work for fmovm dynamic
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| /linux/arch/arc/include/asm/ |
| H A D | entry-arcv2.h | 168 ; ISA requires ADD.nz to have same dest and src reg operands
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| /linux/Documentation/arch/loongarch/ |
| H A D | introduction.rst | 224 "additional") are the source register operands. I8/I12/I14/I16/I21/I26 are 225 immediate operands of respective width. The longer I21 and I26 are stored
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| /linux/arch/s390/ |
| H A D | Kconfig | 61 operands are used within inline assemblies. 73 input operands in inline assemblies.
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| /linux/Documentation/arch/s390/ |
| H A D | 3270.rst | 171 A. Is the driver loaded? Use the lsmod command (no operands)
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| /linux/tools/arch/x86/lib/ |
| H A D | x86-opcode-map.txt | 356 # NOTE: According to Intel SDM opcode map, vmovups and vmovupd has no operands 357 # but it actually has operands. And also, vmovss and vmovsd only accept 128bit.
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