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Searched refs:op1 (Results 1 – 25 of 31) sorted by relevance

12

/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_qmath.c13 u16 qm_mulu16(u16 op1, u16 op2) in qm_mulu16() argument
15 return (u16) (((u32) op1 * (u32) op2) >> 16); in qm_mulu16()
26 s16 qm_muls16(s16 op1, s16 op2) in qm_muls16() argument
29 if (op1 == (s16) 0x8000 && op2 == (s16) 0x8000) in qm_muls16()
32 result = ((s32) (op1) * (s32) (op2)); in qm_muls16()
42 s32 qm_add32(s32 op1, s32 op2) in qm_add32() argument
45 result = op1 + op2; in qm_add32()
46 if (op1 < 0 && op2 < 0 && result > 0) in qm_add32()
48 else if (op1 > 0 && op2 > 0 && result < 0) in qm_add32()
59 s16 qm_add16(s16 op1, s16 op2) in qm_add16() argument
[all …]
H A Dphy_qmath.h11 u16 qm_mulu16(u16 op1, u16 op2);
13 s16 qm_muls16(s16 op1, s16 op2);
15 s32 qm_add32(s32 op1, s32 op2);
17 s16 qm_add16(s16 op1, s16 op2);
19 s16 qm_sub16(s16 op1, s16 op2);
/linux/arch/arc/include/asm/
H A Datomic64-arcv2.h49 #define ATOMIC64_OP(op, op1, op2) \ argument
57 " " #op1 " %L0, %L0, %L2 \n" \
66 #define ATOMIC64_OP_RETURN(op, op1, op2) \ argument
74 " " #op1 " %L0, %L0, %L2 \n" \
88 #define ATOMIC64_FETCH_OP(op, op1, op2) \ argument
96 " " #op1 " %L1, %L0, %L3 \n" \
115 #define ATOMIC64_OPS(op, op1, op2) \ argument
116 ATOMIC64_OP(op, op1, op2) \
117 ATOMIC64_OP_RETURN(op, op1, op2) \
118 ATOMIC64_FETCH_OP(op, op1, op2)
[all …]
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gpu_commands.h345 #define MI_MATH_INSTR(opcode, op1, op2) ((opcode) << 20 | (op1) << 10 | (op2)) argument
348 #define MI_MATH_LOAD(op1, op2) MI_MATH_INSTR(0x080, op1, op2) argument
349 #define MI_MATH_LOADINV(op1, op2) MI_MATH_INSTR(0x480, op1, op2) argument
350 #define MI_MATH_LOAD0(op1) MI_MATH_INSTR(0x081, op1) argument
351 #define MI_MATH_LOAD1(op1) MI_MATH_INSTR(0x481, op1) argument
357 #define MI_MATH_STORE(op1, op2) MI_MATH_INSTR(0x180, op1, op2) argument
358 #define MI_MATH_STOREINV(op1, op2) MI_MATH_INSTR(0x580, op1, op2) argument
/linux/include/trace/events/
H A Dhost1x.h50 TP_PROTO(const char *name, u32 op1, u32 op2),
52 TP_ARGS(name, op1, op2),
56 __field(u32, op1)
62 __entry->op1 = op1;
67 __entry->name, __entry->op1, __entry->op2)
71 TP_PROTO(const char *name, u32 op1, u32 op2, u32 op3, u32 op4),
73 TP_ARGS(name, op1, op2, op3, op4),
77 __field(u32, op1)
85 __entry->op1 = op1;
92 __entry->name, __entry->op1, __entry->op2, __entry->op3,
/linux/arch/powerpc/math-emu/
H A Dmath.c28 #define FLOATFUNC(x) static inline int x(void *op1, void *op2, void *op3, \
228 void *op0 = NULL, *op1 = NULL, *op2 = NULL, *op3 = NULL; in do_mathemu() local
333 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
339 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
345 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
354 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); in do_mathemu()
364 op1 = (void *)(regs->gpr[idx] + sdisp); in do_mathemu()
373 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f); in do_mathemu()
378 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f); in do_mathemu()
384 op1 = (void *)((idx ? regs->gpr[idx] : 0) in do_mathemu()
[all …]
/linux/arch/arm/include/asm/
H A Datomic.h311 #define ATOMIC64_OP(op, op1, op2) \ argument
320 " " #op1 " %Q0, %Q0, %Q4\n" \
330 #define ATOMIC64_OP_RETURN(op, op1, op2) \ argument
341 " " #op1 " %Q0, %Q0, %Q4\n" \
353 #define ATOMIC64_FETCH_OP(op, op1, op2) \ argument
364 " " #op1 " %Q1, %Q0, %Q5\n" \
376 #define ATOMIC64_OPS(op, op1, op2) \ argument
377 ATOMIC64_OP(op, op1, op2) \
378 ATOMIC64_OP_RETURN(op, op1, op2) \
379 ATOMIC64_FETCH_OP(op, op1, op2)
[all …]
/linux/arch/sh/kernel/
H A Dkprobes.c144 struct kprobe *op1, *op2; in prepare_singlestep() local
148 op1 = this_cpu_ptr(&saved_next_opcode); in prepare_singlestep()
153 op1->addr = (kprobe_opcode_t *) regs->regs[reg_nr]; in prepare_singlestep()
156 op1->addr = in prepare_singlestep()
161 op1->addr = in prepare_singlestep()
166 op1->addr = (kprobe_opcode_t *) regs->pr; in prepare_singlestep()
171 op1->addr = p->addr + 1; in prepare_singlestep()
181 op1->addr = p->addr + 2; in prepare_singlestep()
189 op1->addr = p->addr + 1; in prepare_singlestep()
192 op1->opcode = *(op1->addr); in prepare_singlestep()
[all …]
/linux/arch/x86/kvm/svm/
H A Dsvm_ops.h19 #define svm_asm1(insn, op1, clobber...) \ argument
23 :: op1 : clobber : fault); \
29 #define svm_asm2(insn, op1, op2, clobber...) \ argument
33 :: op1, op2 : clobber : fault); \
/linux/lib/zlib_dfltcc/
H A Ddfltcc_util.h32 Byte **op1, in dfltcc() argument
39 Byte *t2 = op1 ? *op1 : NULL; in dfltcc()
90 if (op1) in dfltcc()
91 *op1 = t2; in dfltcc()
/linux/arch/x86/crypto/
H A Dcast6-avx-x86_64-asm_64.S85 #define lookup_32bit(src, dst, op1, op2, op3, interleave_op, il_reg) \ argument
91 op1 (RID1,RID2,4), dst ## d; \
115 #define F_tail(a, x, gi1, gi2, op1, op2, op3) \ argument
116 lookup_32bit(##gi1, RFS1, op1, op2, op3, shr_next, ##gi1); \
117 lookup_32bit(##gi2, RFS3, op1, op2, op3, shr_next, ##gi2); \
119 lookup_32bit(##gi1, RFS2, op1, op2, op3, dummy, none); \
122 lookup_32bit(##gi2, RFS1, op1, op2, op3, dummy, none); \
129 #define F_2(a1, b1, a2, b2, op0, op1, op2, op3) \ argument
133 F_tail(b1, RX, RGI1, RGI2, op1, op2, op3); \
134 F_tail(b2, RTMP, RGI3, RGI4, op1, op2, op3); \
/linux/tools/arch/arm64/include/asm/
H A Desr.h217 #define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \ argument
219 ((op1) << ESR_ELx_SYS64_ISS_OP1_SHIFT) | \
333 #define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \ argument
334 (((op1) << ESR_ELx_CP15_32_ISS_OP1_SHIFT) | \
354 #define ESR_ELx_CP15_64_ISS_SYS_VAL(op1, crm) \ argument
355 (((op1) << ESR_ELx_CP15_64_ISS_OP1_SHIFT) | \
/linux/tools/objtool/arch/x86/
H A Ddecode.c225 unsigned char op1, op2, op3, prefix, in arch_decode_instruction()
252 op1 = ins.opcode.bytes[0]; in arch_decode_instruction()
278 switch (op1) { in arch_decode_instruction()
299 op->src.reg = (op1 & 0x7) + 8*rex_b; in arch_decode_instruction()
311 op->dest.reg = (op1 & 0x7) + 8*rex_b; in arch_decode_instruction()
351 if (op1 & 2) { /* sign extend */ in arch_decode_instruction()
352 if (op1 & 1) { /* imm32 */ in arch_decode_instruction()
161 unsigned char op1, op2, op3, prefix, arch_decode_instruction() local
/linux/drivers/gpu/host1x/
H A Dcdma.h83 void host1x_cdma_push(struct host1x_cdma *cdma, u32 op1, u32 op2);
84 void host1x_cdma_push_wide(struct host1x_cdma *cdma, u32 op1, u32 op2,
/linux/lib/zstd/decompress/
H A Dhuf_decompress.c632 BYTE* op1 = ostart; in HUF_decompress4X1_usingDTable_internal_body() local
651 HUF_DECODE_SYMBOLX1_2(op1, &bitD1); in HUF_decompress4X1_usingDTable_internal_body()
655 HUF_DECODE_SYMBOLX1_1(op1, &bitD1); in HUF_decompress4X1_usingDTable_internal_body()
659 HUF_DECODE_SYMBOLX1_2(op1, &bitD1); in HUF_decompress4X1_usingDTable_internal_body()
663 HUF_DECODE_SYMBOLX1_0(op1, &bitD1); in HUF_decompress4X1_usingDTable_internal_body()
677 if (op1 > opStart2) return ERROR(corruption_detected); in HUF_decompress4X1_usingDTable_internal_body()
683 HUF_decodeStreamX1(op1, &bitD1, opStart2, dt, dtLog); in HUF_decompress4X1_usingDTable_internal_body()
1413 BYTE* op1 = ostart; in HUF_decompress4X2_usingDTable_internal_body() local
1433 HUF_DECODE_SYMBOLX2_2(op1, &bitD1); in HUF_decompress4X2_usingDTable_internal_body()
1434 HUF_DECODE_SYMBOLX2_1(op1, &bitD1); in HUF_decompress4X2_usingDTable_internal_body()
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-rock-pi-4a-plus.dts8 #include "rk3399-op1.dtsi"
H A Drk3399-rock-pi-4b-plus.dts8 #include "rk3399-op1.dtsi"
/linux/arch/powerpc/include/asm/
H A Dmpc52xx_psc.h203 u8 op1; /* PSC + 0x38 */ member
344 u8 op1; /* PSC + 0x48 */ member
/linux/arch/arm64/include/asm/
H A Dsysreg.h40 #define sys_reg(op0, op1, crn, crm, op2) \ argument
41 (((op0) << Op0_shift) | ((op1) << Op1_shift) | \
92 #define pstate_field(op1, op2) ((op1) << Op1_shift | (op2) << Op2_shift) argument
116 #define __SYS_BARRIER_INSN(op0, op1, CRn, CRm, op2, Rt) \ argument
118 sys_insn((op0), (op1), (CRn), (CRm), (op2)) | \
/linux/scripts/gcc-plugins/
H A Dgcc-common.h315 static inline gimple gimple_build_assign_with_ops(enum tree_code subcode, tree lhs, tree op1, tree … in gimple_build_assign_with_ops() argument
317 return gimple_build_assign(lhs, subcode, op1, op2 PASS_MEM_STAT); in gimple_build_assign_with_ops()
H A Dlatent_entropy_plugin.c334 static gimple create_assign(enum tree_code code, tree lhs, tree op1, in create_assign() argument
337 return gimple_build_assign_with_ops(code, lhs, op1, op2); in create_assign()
/linux/tools/testing/selftests/kvm/arm64/
H A Dget-reg-list.c214 unsigned op0, op1, crn, crm, op2; in print_reg() local
265 op1 = (id & KVM_REG_ARM64_SYSREG_OP1_MASK) >> KVM_REG_ARM64_SYSREG_OP1_SHIFT; in print_reg()
269 TEST_ASSERT(id == ARM64_SYS_REG(op0, op1, crn, crm, op2), in print_reg()
271 printf("\tARM64_SYS_REG(%d, %d, %d, %d, %d),\n", op0, op1, crn, crm, op2); in print_reg()
/linux/arch/arm/include/asm/hardware/
H A Dcp14.h17 #define MRC14(op1, crn, crm, op2) \ argument
20 asm volatile("mrc p14, "#op1", %0, "#crn", "#crm", "#op2 : "=r" (val)); \
24 #define MCR14(val, op1, crn, crm, op2) \ argument
26 asm volatile("mcr p14, "#op1", %0, "#crn", "#crm", "#op2 : : "r" (val));\
/linux/drivers/platform/x86/lenovo/
H A Dideapad-laptop.c2049 unsigned long op1, op2; in ideapad_psy_ext_set_prop() local
2057 op1 = SBMC_CONSERVATION_OFF; in ideapad_psy_ext_set_prop()
2061 op1 = SBMC_RAPID_CHARGE_OFF; in ideapad_psy_ext_set_prop()
2065 op1 = SBMC_RAPID_CHARGE_OFF; in ideapad_psy_ext_set_prop()
2076 err = exec_sbmc(priv->adev->handle, op1); in ideapad_psy_ext_set_prop()
/linux/drivers/iommu/
H A Dmsm_iommu.c28 #define MRC(reg, processor, op1, crn, crm, op2) \ argument
30 " mrc " #processor "," #op1 ", %0," #crn "," #crm "," #op2 "\n" \

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