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Searched refs:odm_pipe (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_hwss_hpo_frl.c33 struct pipe_ctx *odm_pipe; in setup_hpo_frl_stream_attribute() local
37 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in setup_hpo_frl_stream_attribute()
H A Dlink_dpms.c674 struct pipe_ctx *odm_pipe; in link_set_dsc_on_stream() local
690 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in link_set_dsc_on_stream()
714 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in link_set_dsc_on_stream()
715 struct display_stream_compressor *odm_dsc = odm_pipe->stream_res.dsc; in link_set_dsc_on_stream()
720 odm_dsc->funcs->dsc_enable(odm_dsc, odm_pipe->stream_res.opp->inst); in link_set_dsc_on_stream()
773 for (odm_pipe = pipe_ctx; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in link_set_dsc_on_stream()
774 odm_pipe->stream_res.dsc->funcs->dsc_disconnect(odm_pipe->stream_res.dsc); in link_set_dsc_on_stream()
796 odm_pipe->stream_res.dsc->funcs->dsc_disable(odm_pipe->stream_res.dsc); in link_set_dsc_on_stream()
798 dccg->funcs->set_ref_dscclk(dccg, odm_pipe->stream_res.dsc->inst); in link_set_dsc_on_stream()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c1256 struct pipe_ctx *odm_pipe; in get_pixel_clock_parameters() local
1263 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in get_pixel_clock_parameters()
1690 struct pipe_ctx *odm_pipe; in dcn20_validate_dsc() local
1693 for (odm_pipe = pipe_ctx->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in dcn20_validate_dsc()
1805 struct pipe_ctx *odm_pipe = pipe->next_odm_pipe; in dcn20_merge_pipes_for_validate() local
1811 while (odm_pipe) { in dcn20_merge_pipes_for_validate()
1812 struct pipe_ctx *next_odm_pipe = odm_pipe->next_odm_pipe; in dcn20_merge_pipes_for_validate()
1814 odm_pipe->plane_state = NULL; in dcn20_merge_pipes_for_validate()
1815 odm_pipe->stream = NULL; in dcn20_merge_pipes_for_validate()
1816 odm_pipe->top_pipe = NULL; in dcn20_merge_pipes_for_validate()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c1553 struct pipe_ctx *odm_pipe; in dcn401_add_dsc_sequence_for_odm_change() local
1560 for (odm_pipe = otg_master->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) in dcn401_add_dsc_sequence_for_odm_change()
1579 for (odm_pipe = otg_master->next_odm_pipe; odm_pipe; odm_pipe = odm_pipe->next_odm_pipe) { in dcn401_add_dsc_sequence_for_odm_change()
1580 if (!odm_pipe->stream_res.dsc) in dcn401_add_dsc_sequence_for_odm_change()
1586 odm_pipe->stream_res.dsc->inst, num_slices_h); in dcn401_add_dsc_sequence_for_odm_change()
1591 hwss_add_dsc_calculate_and_set_config(seq_state, odm_pipe, true, opp_cnt); in dcn401_add_dsc_sequence_for_odm_change()
1594 hwss_add_dsc_enable_with_opp(seq_state, odm_pipe); in dcn401_add_dsc_sequence_for_odm_change()
1822 struct pipe_ctx *odm_pipe, *mpc_pipe; in dcn401_perform_3dlut_wa_unlock() local
1825 for (odm_pipe = pipe_ctx; odm_pipe != NULL; odm_pipe = odm_pipe->next_odm_pipe) { in dcn401_perform_3dlut_wa_unlock()
1826 for (mpc_pipe = odm_pipe; mpc_pipe != NULL; mpc_pipe = mpc_pipe->bottom_pipe) { in dcn401_perform_3dlut_wa_unlock()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c1645 struct pipe_ctx *odm_pipe = pipe_ctx->next_odm_pipe; in dce110_apply_single_controller_ctx_to_hw() local
1691 while (odm_pipe) { in dce110_apply_single_controller_ctx_to_hw()
1692 odm_pipe->stream_res.opp->funcs->opp_set_dyn_expansion( in dce110_apply_single_controller_ctx_to_hw()
1693 odm_pipe->stream_res.opp, in dce110_apply_single_controller_ctx_to_hw()
1698 odm_pipe->stream_res.opp->funcs->opp_program_fmt( in dce110_apply_single_controller_ctx_to_hw()
1699 odm_pipe->stream_res.opp, in dce110_apply_single_controller_ctx_to_hw()
1702 odm_pipe = odm_pipe->next_odm_pipe; in dce110_apply_single_controller_ctx_to_hw()