Searched refs:od_enabled (Results 1 – 18 of 18) sorted by relevance
106 hwmgr->od_enabled = false; in hwmgr_early_init()111 hwmgr->od_enabled = false; in hwmgr_early_init()126 hwmgr->od_enabled = false; in hwmgr_early_init()181 hwmgr->od_enabled = false; in hwmgr_early_init()463 hwmgr->od_enabled = true; in hwmgr_set_user_specify_caps()
591 hwmgr->od_enabled = 1; in smu10_hwmgr_backend_init()1074 if (hwmgr->od_enabled) { in smu10_print_clock_levels()1090 if (hwmgr->od_enabled) { in smu10_print_clock_levels()1544 if (!hwmgr->od_enabled) { in smu10_set_fine_grain_clk_vol()
1626 if (hwmgr->od_enabled) in vega10_populate_single_gfx_level()1691 if (hwmgr->od_enabled) { in vega10_populate_single_soc_level()1794 if (hwmgr->od_enabled) in vega10_populate_vddc_soc_levels()1830 if (hwmgr->od_enabled) in vega10_populate_single_memory_level()2583 if (hwmgr->od_enabled) { in vega10_init_smc_table()3494 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()3500 if (hwmgr->od_enabled && data->need_update_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in vega10_populate_and_upload_sclk_mclk_dpm_levels()4785 if (!hwmgr->od_enabled) in vega10_emit_clock_levels()4796 if (!hwmgr->od_enabled) in vega10_emit_clock_levels()4807 if (!hwmgr->od_enabled) in vega10_emit_clock_levels()[all …]
1077 if (hwmgr->od_enabled) { in smu7_setup_default_dpm_tables()4262 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_SCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()4269 if (hwmgr->od_enabled && data->need_update_smu7_dpm_table & DPMTABLE_OD_UPDATE_MCLK) { in smu7_populate_and_upload_sclk_mclk_dpm_levels()4306 if ((!hwmgr->od_enabled || force_trim) in smu7_trim_single_dpm_states()5027 if (hwmgr->od_enabled) { in smu7_print_clock_levels()5036 if (hwmgr->od_enabled) { in smu7_print_clock_levels()5045 if (hwmgr->od_enabled) { in smu7_print_clock_levels()5508 if (!hwmgr->od_enabled) { in smu7_odn_edit_dpm_table()
1135 hwmgr->od_enabled = false; in vega20_od8_set_feature_capabilities()
1363 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()1371 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()1378 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()1401 if (!smu->od_enabled || !od_table || !od_settings) in navi10_emit_clk_levels()1564 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()1573 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()1581 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()1604 if (!smu->od_enabled || !od_table || !od_settings) in navi10_print_clk_levels()2414 if (smu->od_enabled && in navi10_get_power_limit()2636 if (!smu->od_enabled) { in navi10_od_edit_dpm_table()
651 if (smu->od_enabled && in sienna_cichlid_get_power_limit()1369 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()1380 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()1391 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()1408 if (!smu->od_enabled || !od_table || !od_settings) in sienna_cichlid_print_clk_levels()2285 if (!smu->od_enabled) { in sienna_cichlid_od_edit_dpm_table()
678 smu->od_enabled = true; in smu_set_funcs()718 smu->od_enabled = false; in smu_set_funcs()723 smu->od_enabled = true; in smu_set_funcs()734 smu->od_enabled = true; in smu_set_funcs()877 if (!amdgpu_sriov_vf(adev) || smu->od_enabled) { in smu_late_init()
970 if (hwmgr->od_enabled) { in pp_set_power_limit()1005 if (hwmgr->od_enabled) { in pp_get_power_limit()
363 smu->od_enabled = false; in smu_v13_0_7_check_powerplay_table()2433 if (smu->od_enabled && in smu_v13_0_7_get_power_limit()2710 } else if (smu->od_enabled) { in smu_v13_0_7_set_power_limit()
370 smu->od_enabled = false; in smu_v13_0_0_check_powerplay_table()2467 if (smu->od_enabled && in smu_v13_0_0_get_power_limit()3121 } else if (smu->od_enabled) { in smu_v13_0_0_set_power_limit()
1594 return (smu->od_enabled || smu->is_apu); in amdgpu_dpm_is_overdrive_supported()1607 return hwmgr->od_enabled; in amdgpu_dpm_is_overdrive_supported()
803 bool od_enabled; member
539 bool od_enabled; member
949 if (hwmgr->od_enabled) in fiji_populate_single_graphic_level()1171 if (hwmgr->od_enabled) in fiji_populate_single_memory_level()
969 if (hwmgr->od_enabled) in polaris10_populate_single_graphic_level()1164 if (hwmgr->od_enabled) in polaris10_populate_single_memory_level()
629 if (hwmgr->od_enabled) in tonga_populate_single_graphic_level()977 if (hwmgr->od_enabled) in tonga_populate_single_memory_level()
341 smu->od_enabled = false; in smu_v14_0_2_check_powerplay_table()2741 } else if (smu->od_enabled) { in smu_v14_0_2_set_power_limit()