Searched refs:nx_pcibase (Results 1 – 5 of 5) sorted by relevance
42 return (void __iomem *)(ha->nx_pcibase + off); in qla4_8xxx_pci_base_offsetfset()365 (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_pci_set_crbwindow_2M()369 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_pci_set_crbwindow_2M()375 *off = (*off & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla4_82xx_pci_set_crbwindow_2M()462 writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_rd_32()468 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_rd_32()477 ha->nx_pcibase)); in qla4_82xx_md_rd_32()488 writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_wr_32()493 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_wr_32()502 ha->nx_pcibase)); in qla4_82xx_md_wr_32()[all …]
17 return readl((void __iomem *)(ha->nx_pcibase + addr)); in qla4_83xx_rd_reg()22 writel(val, (void __iomem *)(ha->nx_pcibase + addr)); in qla4_83xx_wr_reg()
735 unsigned long nx_pcibase; /* Base I/O address */ member
4214 if (ha->nx_pcibase) in qla4xxx_mem_free()4216 (struct device_reg_82xx __iomem *)ha->nx_pcibase); in qla4xxx_mem_free()4218 if (ha->nx_pcibase) in qla4xxx_mem_free()4220 (struct device_reg_83xx __iomem *)ha->nx_pcibase); in qla4xxx_mem_free()5553 ha->nx_pcibase = (unsigned long)ioremap(mem_base, mem_len); in qla4_8xxx_iospace_config()5554 if (!ha->nx_pcibase) { in qla4_8xxx_iospace_config()5566 ((uint8_t *)ha->nx_pcibase + 0xbc000 + in qla4_8xxx_iospace_config()5572 ((uint8_t *)ha->nx_pcibase); in qla4_8xxx_iospace_config()
36 return readl((void __iomem *) (ha->nx_pcibase + addr)); in qla8044_rd_reg()42 writel(val, (void __iomem *)((ha)->nx_pcibase + addr)); in qla8044_wr_reg()2571 r_value = readl((void __iomem *)(r_addr + ha->nx_pcibase)); in qla8044_minidump_process_rdocm()