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Searched refs:num_xcc (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_1.c347 int i, num_xcc; in gfx_v12_1_set_kiq_pm4_funcs() local
349 num_xcc = NUM_XCC(adev->gfx.xcc_mask); in gfx_v12_1_set_kiq_pm4_funcs()
350 for (i =0; i < num_xcc; i++) in gfx_v12_1_set_kiq_pm4_funcs()
650 int xcc_id, num_xcc; in gfx_v12_1_init_rlcg_reg_access_ctrl() local
653 num_xcc = NUM_XCC(adev->gfx.xcc_mask); in gfx_v12_1_init_rlcg_reg_access_ctrl()
654 for (xcc_id = 0; xcc_id < num_xcc; xcc_id++) { in gfx_v12_1_init_rlcg_reg_access_ctrl()
683 int r, i, num_xcc; in gfx_v12_1_rlc_init() local
697 num_xcc = NUM_XCC(adev->gfx.xcc_mask); in gfx_v12_1_rlc_init()
698 for (i = 0; i < num_xcc; i++) { in gfx_v12_1_rlc_init()
715 int r, i, num_xcc; in gfx_v12_1_mec_init() local
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H A Dgfx_v9_4_3.c339 int i, num_xcc; in gfx_v9_4_3_set_kiq_pm4_funcs() local
341 num_xcc = NUM_XCC(adev->gfx.xcc_mask); in gfx_v9_4_3_set_kiq_pm4_funcs()
342 for (i = 0; i < num_xcc; i++) in gfx_v9_4_3_set_kiq_pm4_funcs()
348 int i, num_xcc, dev_inst; in gfx_v9_4_3_init_golden_registers() local
350 num_xcc = NUM_XCC(adev->gfx.xcc_mask); in gfx_v9_4_3_init_golden_registers()
351 for (i = 0; i < num_xcc; i++) { in gfx_v9_4_3_init_golden_registers()
617 int r, i, num_xcc; in gfx_v9_4_3_mec_init() local
626 num_xcc = NUM_XCC(adev->gfx.xcc_mask); in gfx_v9_4_3_mec_init()
627 for (i = 0; i < num_xcc; i++) in gfx_v9_4_3_mec_init()
634 adev->gfx.num_compute_rings * num_xcc * GFX9_MEC_HPD_SIZE; in gfx_v9_4_3_mec_init()
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H A Damdgpu_gfx.c215 int num_xcc = adev->gfx.xcc_mask ? NUM_XCC(adev->gfx.xcc_mask) : 1; in amdgpu_gfx_compute_queue_acquire() local
220 for (j = 0; j < num_xcc; j++) { in amdgpu_gfx_compute_queue_acquire()
232 for (j = 0; j < num_xcc; j++) { in amdgpu_gfx_compute_queue_acquire()
238 for (j = 0; j < num_xcc; j++) { in amdgpu_gfx_compute_queue_acquire()
543 int num_xcc, inc, inst = 0; in amdgpu_gfx_mqd_symmetrically_map_cu_mask() local
548 num_xcc = hweight16(adev->gfx.xcc_mask); in amdgpu_gfx_mqd_symmetrically_map_cu_mask()
549 if (!num_xcc) in amdgpu_gfx_mqd_symmetrically_map_cu_mask()
550 num_xcc = 1; in amdgpu_gfx_mqd_symmetrically_map_cu_mask()
552 inc = cu_inc * num_xcc; in amdgpu_gfx_mqd_symmetrically_map_cu_mask()
1211 int num_xcc = adev->gfx.xcc_mask ? NUM_XCC(adev->gfx.xcc_mask) : 1; in amdgpu_gfx_ras_error_func() local
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H A Dmes_v12_1.c1607 int pipe, r, xcc_id, num_xcc = NUM_XCC(adev->gfx.xcc_mask); in mes_v12_1_sw_init() local
1615 …adev->enable_uni_mes ? (AMDGPU_MAX_MES_PIPES * AMDGPU_MES_LOG_BUFFER_SIZE * num_xcc) : AMDGPU_MES_… in mes_v12_1_sw_init()
1621 for (xcc_id = 0; xcc_id < num_xcc; xcc_id++) { in mes_v12_1_sw_init()
1639 if (adev->enable_uni_mes && num_xcc > 1) { in mes_v12_1_sw_init()
1654 int pipe, inst, xcc_id, num_xcc = NUM_XCC(adev->gfx.xcc_mask); in mes_v12_1_sw_fini() local
1656 for (xcc_id = 0; xcc_id < num_xcc; xcc_id++) { in mes_v12_1_sw_fini()
1682 for (xcc_id = 0; xcc_id < num_xcc; xcc_id++) { in mes_v12_1_sw_fini()
1847 u32 num_xcc_per_xcp, num_xcc = NUM_XCC(adev->gfx.xcc_mask); in mes_v12_1_setup_coop_mode() local
1850 if (num_xcc == 1) in mes_v12_1_setup_coop_mode()
1867 (xcc_id/num_xcc_per_xcp) * (num_xcc / 2); in mes_v12_1_setup_coop_mode()
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H A Damdgpu_gmc.c1635 int num_xcc, xcc_id; in amdgpu_gmc_init_acpi_mem_ranges() local
1638 num_xcc = NUM_XCC(adev->gfx.xcc_mask); in amdgpu_gmc_init_acpi_mem_ranges()
1639 xcc_mask = (1U << num_xcc) - 1; in amdgpu_gmc_init_acpi_mem_ranges()
H A Damdgpu_ttm.c882 int num_xcc = max(1U, adev->gfx.num_xcc_per_xcp); in amdgpu_ttm_gart_bind_gfx9_mqd() local
887 do_div(pages_per_xcc, num_xcc); in amdgpu_ttm_gart_bind_gfx9_mqd()
889 for (i = 0, page_idx = 0; i < num_xcc; i++, page_idx += pages_per_xcc) { in amdgpu_ttm_gart_bind_gfx9_mqd()
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_v9.c846 u32 num_xcc; in restore_mqd_v9_4_3() local
853 num_xcc = NUM_XCC(mm->dev->xcc_mask); in restore_mqd_v9_4_3()
854 mqd_ctl_stack_size = ctl_stack_size / num_xcc; in restore_mqd_v9_4_3()
863 for (xcc = 0; xcc < num_xcc; xcc++) { in restore_mqd_v9_4_3()
884 u32 num_xcc = NUM_XCC(mm->dev->xcc_mask); in update_mqd_gpu_addr_v9_4_3() local
890 for (xcc = 0; xcc < num_xcc; xcc++) { in update_mqd_gpu_addr_v9_4_3()
H A Dkfd_process_queue_manager.c984 struct kfd_criu_queue_priv_data *q_data, uint32_t num_xcc) in set_queue_properties_from_criu() argument
998 qp->ctl_stack_size = q_data->ctl_stack_size / num_xcc; in set_queue_properties_from_criu()