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Searched refs:num_timings (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/video/
H A Dof_display_timing.c180 disp->num_timings = of_get_child_count(timings_np); in of_get_display_timings()
181 if (disp->num_timings == 0) { in of_get_display_timings()
187 disp->timings = kzalloc_objs(struct display_timing *, disp->num_timings); in of_get_display_timings()
193 disp->num_timings = 0; in of_get_display_timings()
214 np, disp->num_timings + 1); in of_get_display_timings()
220 disp->native_mode = disp->num_timings; in of_get_display_timings()
222 disp->timings[disp->num_timings] = dt; in of_get_display_timings()
223 disp->num_timings++; in of_get_display_timings()
233 np, disp->num_timings, in of_get_display_timings()
H A Ddisplay_timing.c17 for (i = 0; i < disp->num_timings; i++) in display_timings_release()
/linux/drivers/clk/tegra/
H A Dclk-tegra124-emc.c81 int num_timings; member
125 for (k = 0; k < tegra->num_timings; k++) { in emc_determine_rate()
130 for (t = k; t < tegra->num_timings; t++) { in emc_determine_rate()
296 for (i = timing_index+1; i < tegra->num_timings; i++) { in get_backup_timing()
342 for (i = 0; i < tegra->num_timings; i++) { in emc_set_rate()
451 size = (tegra->num_timings + child_count) * sizeof(struct emc_timing); in load_timings_from_dt()
457 timings_ptr = tegra->timings + tegra->num_timings; in load_timings_from_dt()
458 tegra->num_timings += child_count; in load_timings_from_dt()
502 tegra->num_timings = 0; in tegra124_clk_register_emc()
522 if (tegra->num_timings == 0) in tegra124_clk_register_emc()
/linux/drivers/memory/tegra/
H A Dtegra20-emc.c207 unsigned int num_timings; member
262 for (i = 0; i < emc->num_timings; i++) { in tegra20_emc_find_timing()
438 emc->num_timings++; in tegra20_emc_load_timings_from_dt()
441 sort(emc->timings, emc->num_timings, sizeof(*timing), cmp_timings, in tegra20_emc_load_timings_from_dt()
446 emc->num_timings, in tegra20_emc_load_timings_from_dt()
449 emc->timings[emc->num_timings - 1].rate / 1000000); in tegra20_emc_load_timings_from_dt()
681 if (!emc->num_timings) in emc_round_rate()
684 min_rate = min(min_rate, emc->timings[emc->num_timings - 1].rate); in emc_round_rate()
686 for (i = 0; i < emc->num_timings; i++) { in emc_round_rate()
687 if (emc->timings[i].rate < rate && i != emc->num_timings - 1) in emc_round_rate()
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H A Dtegra210-emc-core.c861 for (i = 0; i < emc->num_timings; i++) in tegra210_emc_find_timing()
1542 for (i = 0; i < emc->num_timings; i++) { in tegra210_emc_set_rate()
1602 for (i = 0; i < emc->num_timings; i++) in tegra210_emc_validate_rate()
1616 for (i = 0; i < emc->num_timings; i++) { in tegra210_emc_debug_available_rates_show()
1727 for (i = 0; i < emc->num_timings; i++) { in tegra210_emc_debugfs_init()
1735 if (!emc->num_timings) { in tegra210_emc_debugfs_init()
1789 unsigned int num_timings) in tegra210_emc_validate_timings() argument
1793 for (i = 0; i < num_timings; i++) { in tegra210_emc_validate_timings()
1866 emc->num_timings); in tegra210_emc_probe()
1873 emc->num_timings); in tegra210_emc_probe()
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H A Dtegra210-emc.h898 unsigned int num_timings; member
/linux/include/video/
H A Ddisplay_timing.h86 unsigned int num_timings; member
97 if (disp->num_timings > index) in display_timings_get()
/linux/drivers/phy/rockchip/
H A Dphy-rockchip-inno-dsidphy.c222 const unsigned int num_timings; member
514 for (i = 0; i < inno->pdata->num_timings; i++) in inno_dsidphy_mipi_mode_enable()
518 if (i == inno->pdata->num_timings) in inno_dsidphy_mipi_mode_enable()
754 .num_timings = ARRAY_SIZE(inno_mipi_dphy_timing_table_max_1ghz),
761 .num_timings = ARRAY_SIZE(inno_mipi_dphy_timing_table_max_1_5ghz),
768 .num_timings = ARRAY_SIZE(inno_mipi_dphy_timing_table_max_2_5ghz),
/linux/drivers/video/fbdev/
H A Dpxafb.c2111 info->modes = devm_kcalloc(dev, timings->num_timings, in of_get_pxafb_display()
2116 info->num_modes = timings->num_timings; in of_get_pxafb_display()
2118 for (i = 0; i < timings->num_timings; i++) { in of_get_pxafb_display()
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddml2_wrapper_fpu.c126 for (i = 0; i < (int) p->cur_display_config->num_timings; i++) { in optimize_configuration()
H A Ddml2_translation_helper.c1338 disp_cfg_stream_location = dml_dispcfg->num_timings++; in map_dc_state_into_dml_display_cfg()
1428 dml_dispcfg->num_timings++; in map_dc_state_into_dml_display_cfg()
H A Ddisplay_mode_core_structs.h683 unsigned int num_timings; member