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Searched refs:num_slices_h (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_dsc.h90 uint32_t bpp_x16, uint32_t num_slices_h, bool is_dp);
94 const int num_slices_h,
H A Ddc_hw_types.h861 uint32_t num_slices_h; /* Number of DSC slices - horizontal */ member
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_mst_types.c880 uint32_t num_slices_h; member
940 if (params[i].num_slices_h) in set_dsc_configs_from_fairness_vars()
941 params[i].timing->dsc_cfg.num_slices_h = params[i].num_slices_h; in set_dsc_configs_from_fairness_vars()
1242 params[count].num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in compute_mst_dsc_configs_for_link()
H A Damdgpu_dm.c7212 stream->timing.dsc_cfg.num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in apply_dsc_policy_for_stream()
/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c842 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in link_set_dsc_on_stream()
843 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in link_set_dsc_on_stream()
847 dccg->funcs->set_dto_dscclk(dccg, dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h); in link_set_dsc_on_stream()
854 dccg->funcs->set_dto_dscclk(dccg, odm_dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h); in link_set_dsc_on_stream()
858 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in link_set_dsc_on_stream()
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c2252 int num_slices_h = params->dccg_set_dto_dscclk_params.num_slices_h; in hwss_dccg_set_dto_dscclk() local
2255 dccg->funcs->set_dto_dscclk(dccg, inst, num_slices_h); in hwss_dccg_set_dto_dscclk()
2342 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in hwss_dsc_calculate_and_set_config()
3148 struct dccg *dccg, int inst, int num_slices_h) in hwss_add_dccg_set_dto_dscclk() argument
3154 …_state->steps[*seq_state->num_steps].params.dccg_set_dto_dscclk_params.num_slices_h = num_slices_h; in hwss_add_dccg_set_dto_dscclk()
H A Ddc.c3338 uint32_t enable_dsc = (update->dsc_config->num_slices_h != 0 && in copy_stream_update_to_stream()
6773 if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->timing.dsc_cfg.num_slices_h > 0) { in dc_capture_register_software_state()
6791 if (pipe_ctx->stream && pipe_ctx->stream->timing.dsc_cfg.num_slices_h > 0) { in dc_capture_register_software_state()
6797 state->dsc[i].dsc_num_slices_h = dsc_cfg->num_slices_h; in dc_capture_register_software_state()
6986 if (timing->dsc_cfg.num_slices_h > 0) { in dc_capture_register_software_state()
7057 if (timing->dsc_cfg.num_slices_h > 0) { in dc_capture_register_software_state()
7060 state->optc[i].optc_dsc_slice_width = timing->h_addressable / timing->dsc_cfg.num_slices_h; in dc_capture_register_software_state()
H A Ddc_stream.c115 stream->timing.dsc_cfg.num_slices_h = 0; in dc_stream_construct()
/linux/drivers/gpu/drm/amd/display/dc/hwss/
H A Dhw_sequencer.h223 int num_slices_h; member
1711 struct dccg *dccg, int inst, int num_slices_h);
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/
H A Ddcn401_hwseq.c1638 int num_slices_h = stream->timing.dsc_cfg.num_slices_h / opp_cnt; in dcn401_add_dsc_sequence_for_odm_change() local
1643 otg_master->stream_res.dsc->inst, num_slices_h); in dcn401_add_dsc_sequence_for_odm_change()
1661 odm_pipe->stream_res.dsc->inst, num_slices_h); in dcn401_add_dsc_sequence_for_odm_change()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c1464 stream->timing.dsc_cfg.num_slices_h; in build_audio_output()