Searched refs:num_slices_h (Results 1 – 8 of 8) sorted by relevance
73 uint32_t num_slices_h) in dccg60_set_dto_dscclk() argument88 if (num_slices_h == 1) in dccg60_set_dto_dscclk()99 if (num_slices_h == 1) in dccg60_set_dto_dscclk()110 if (num_slices_h == 1) in dccg60_set_dto_dscclk()121 if (num_slices_h == 1) in dccg60_set_dto_dscclk()
930 uint32_t num_slices_h; member990 if (params[i].num_slices_h) in set_dsc_configs_from_fairness_vars()991 params[i].timing->dsc_cfg.num_slices_h = params[i].num_slices_h; in set_dsc_configs_from_fairness_vars()1366 params[count].num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in compute_mst_dsc_configs_for_link()
1382 stream->timing.dsc_cfg.num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in apply_dsc_policy_for_stream()
764 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in link_set_dsc_on_stream()765 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in link_set_dsc_on_stream()769 dccg->funcs->set_dto_dscclk(dccg, dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h); in link_set_dsc_on_stream()776 dccg->funcs->set_dto_dscclk(dccg, odm_dsc->inst, dsc_cfg.dc_dsc_cfg.num_slices_h); in link_set_dsc_on_stream()780 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in link_set_dsc_on_stream()
2014 uint32_t num_slices_h = 0; in dc_validate_boot_timing() local2018 …num_slices_h = (crtc_timing->h_addressable + dsc_state.dsc_slice_width - 1) / dsc_state.dsc_slice_… in dc_validate_boot_timing()2025 if (crtc_timing->dsc_cfg.num_slices_h != num_slices_h) { in dc_validate_boot_timing()3581 uint32_t enable_dsc = (update->dsc_config->num_slices_h != 0 && in copy_stream_update_to_stream()4100 ASSERT(dsc_cfg->dc_dsc_cfg.num_slices_h % opp_cnt == 0); in add_link_update_dsc_config_sequence()4101 dsc_cfg->dc_dsc_cfg.num_slices_h /= opp_cnt; in add_link_update_dsc_config_sequence()4110 dsc_cfg->dc_dsc_cfg.num_slices_h); in add_link_update_dsc_config_sequence()4121 dsc_cfg->dc_dsc_cfg.num_slices_h); in add_link_update_dsc_config_sequence()7804 if (pipe_ctx && pipe_ctx->stream && pipe_ctx->stream->timing.dsc_cfg.num_slices_h > 0) { in dc_capture_register_software_state()7836 if (pipe_ctx->stream && pipe_ctx->stream->timing.dsc_cfg.num_slices_h > 0) { in dc_capture_register_software_state()[all …]
4747 if (hactive % stream->timing.dsc_cfg.num_slices_h != 0) { in calculate_timing_params_for_dsc_with_padding()4748 ceil_slice_width = (hactive / stream->timing.dsc_cfg.num_slices_h) + 1; in calculate_timing_params_for_dsc_with_padding()4755 (uint8_t)(ceil_slice_width * stream->timing.dsc_cfg.num_slices_h - hactive); in calculate_timing_params_for_dsc_with_padding()
109 stream->timing.dsc_cfg.num_slices_h; in dcn60_build_audio_output()
795 out->DSCSlices[location] = in->timing.dsc_cfg.num_slices_h; in populate_dml_output_cfg_from_stream_state()