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Searched refs:num_se (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_powertune.c887 uint32_t num_se = 0, count, data; in vega10_enable_cac_driving_se_didt_config() local
889 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_cac_driving_se_didt_config()
894 for (count = 0; count < num_se; count++) { in vega10_enable_cac_driving_se_didt_config()
938 uint32_t num_se = 0, count, data; in vega10_enable_psm_gc_didt_config() local
940 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_psm_gc_didt_config()
945 for (count = 0; count < num_se; count++) { in vega10_enable_psm_gc_didt_config()
999 uint32_t num_se = 0, count, data; in vega10_enable_se_edc_config() local
1001 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_se_edc_config()
1006 for (count = 0; count < num_se; count++) { in vega10_enable_se_edc_config()
1046 uint32_t num_se = 0; in vega10_enable_psm_gc_edc_config() local
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H A Dsmu7_powertune.c961 uint32_t num_se = 0; in smu7_enable_didt_config() local
966 num_se = adev->gfx.config.max_shader_engines; in smu7_enable_didt_config()
977 for (count = 0; count < num_se; count++) { in smu7_enable_didt_config()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/tests/
H A Damdgpu_dm_plane_test.c541 adev->gfx.config.gb_addr_config_fields.num_se = 1; in dm_test_fill_gfx12_plane_attributes_from_modifiers()
591 adev->gfx.config.gb_addr_config_fields.num_se = 1; in dm_test_fill_gfx9_plane_attributes_from_modifiers()
956 adev->gfx.config.gb_addr_config_fields.num_se = 2; in dm_test_fill_gfx9_tiling_info_from_device_pre_10_3()
993 adev->gfx.config.gb_addr_config_fields.num_se = 1; in dm_test_fill_gfx9_tiling_info_from_device_10_3_plus()
1029 adev->gfx.config.gb_addr_config_fields.num_se = 2; in dm_test_fill_gfx9_tiling_info_from_modifier_linear()
1067 adev->gfx.config.gb_addr_config_fields.num_se = 2; in dm_test_fill_gfx9_tiling_info_from_modifier_pre_nv()
1109 adev->gfx.config.gb_addr_config_fields.num_se = 1; in dm_test_fill_gfx9_tiling_info_from_modifier_nv()
1405 adev->gfx.config.gb_addr_config_fields.num_se = 2; in dm_test_get_plane_modifiers_gfx9()
1437 adev->gfx.config.gb_addr_config_fields.num_se = 2; in dm_test_get_plane_modifiers_rv()
1494 adev->gfx.config.gb_addr_config_fields.num_se = 2; in dm_test_get_plane_modifiers_rv_constant_encode()
/linux/drivers/iio/adc/
H A Dstm32-adc.c2182 int num_se = nchans - num_diff; in stm32_adc_legacy_chan_init()
2209 if (num_se > 0) { in stm32_adc_legacy_chan_init()
2210 ret = device_property_read_u32_array(dev, "st,adc-channels", chans, num_se); in stm32_adc_legacy_chan_init()
2216 for (c = 0; c < num_se; c++) { in stm32_adc_legacy_chan_init()
2177 int num_se = nchans - num_diff; stm32_adc_legacy_chan_init() local
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c243 adev->gfx.config.gb_addr_config_fields.num_se; in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier()
723 ilog2(adev->gfx.config.gb_addr_config_fields.num_se)); in amdgpu_dm_plane_add_gfx6_modifiers()
726 int rb = ilog2(adev->gfx.config.gb_addr_config_fields.num_se) + in amdgpu_dm_plane_add_gfx6_modifiers()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v8_0.c3492 unsigned num_se = max_t(unsigned, adev->gfx.config.max_shader_engines, 1); in gfx_v8_0_write_harvested_raster_configs() local
3493 unsigned rb_per_pkr = min_t(unsigned, num_rb / num_se / sh_per_se, 2); in gfx_v8_0_write_harvested_raster_configs()
3494 unsigned rb_per_se = num_rb / num_se; in gfx_v8_0_write_harvested_raster_configs()
3503 WARN_ON(!(num_se == 1 || num_se == 2 || num_se == 4)); in gfx_v8_0_write_harvested_raster_configs()
3507 if ((num_se > 2) && ((!se_mask[0] && !se_mask[1]) || in gfx_v8_0_write_harvested_raster_configs()
3520 for (se = 0; se < num_se; se++) { in gfx_v8_0_write_harvested_raster_configs()
3526 if ((num_se > 1) && (!se_mask[idx] || !se_mask[idx + 1])) { in gfx_v8_0_write_harvested_raster_configs()
H A Dgfx_v9_4_3.c889 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v9_4_3_gpu_early_init()
H A Dgfx_v12_1.c2948 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in get_gb_addr_config()
H A Dgfx_v12_0.c3650 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in get_gb_addr_config()
H A Dgfx_v9_0.c2141 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v9_0_gpu_early_init()
H A Dgfx_v11_0.c4833 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in get_gb_addr_config()
H A Dgfx_v10_0.c4643 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v10_0_gpu_early_init()