Searched refs:num_plane (Results 1 – 4 of 4) sorted by relevance
527 void dml_print_dml_display_cfg_timing(const struct dml_timing_cfg_st *timing, dml_uint_t num_plane) in dml_print_dml_display_cfg_timing() argument529 for (dml_uint_t i = 0; i < num_plane; i++) { in dml_print_dml_display_cfg_timing()543 void dml_print_dml_display_cfg_plane(const struct dml_plane_cfg_st *plane, dml_uint_t num_plane) in dml_print_dml_display_cfg_plane() argument545 dml_print("DML: plane_cfg: num_plane = %d\n", num_plane); in dml_print_dml_display_cfg_plane()551 for (dml_uint_t i = 0; i < num_plane; i++) { in dml_print_dml_display_cfg_plane()591 …d dml_print_dml_display_cfg_surface(const struct dml_surface_cfg_st *surface, dml_uint_t num_plane) in dml_print_dml_display_cfg_surface() argument593 for (dml_uint_t i = 0; i < num_plane; i++) { in dml_print_dml_display_cfg_surface()610 …id dml_print_dml_display_cfg_hw_resource(const struct dml_hw_resource_st *hw, dml_uint_t num_plane) in dml_print_dml_display_cfg_hw_resource() argument612 for (dml_uint_t i = 0; i < num_plane; i++) { in dml_print_dml_display_cfg_hw_resource()
1488 if (dev->num_plane) { in mlx5_query_hca_port()3218 static int mlx5_ib_get_plane_num(struct mlx5_core_dev *mdev, u8 *num_plane) in mlx5_ib_get_plane_num() argument3223 *num_plane = 0; in mlx5_ib_get_plane_num()3231 *num_plane = vport_ctx.num_plane; in mlx5_ib_get_plane_num()3245 if (dev->num_plane) { in set_has_smi_cap()3531 if (dev->num_plane) in get_core_cap_flags()5197 if (type != RDMA_DEVICE_TYPE_SMI || !mparent->num_plane || in mlx5_ib_add_sub_dev()5208 mparent->num_plane * mparent->num_ports); in mlx5_ib_add_sub_dev()5216 mplane->num_ports = mparent->num_plane; in mlx5_ib_add_sub_dev()5323 ret = mlx5_ib_get_plane_num(mdev, &dev->num_plane); in mlx5r_probe()
888 u8 num_plane; member
821 rep->num_plane = MLX5_GET_PR(hca_vport_context, ctx, num_port_plane); in mlx5_query_hca_vport_context()