Home
last modified time | relevance | path

Searched refs:num_memclk_levels (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c1038 &num_entries_per_clk->num_memclk_levels); in dcn32_get_memclk_states_from_smu()
1043 …num_entries_per_clk->num_memclk_levels = num_entries_per_clk->num_memclk_levels ? num_entries_per_… in dcn32_get_memclk_states_from_smu()
1050 if (num_entries_per_clk->num_memclk_levels >= num_entries_per_clk->num_fclk_levels) { in dcn32_get_memclk_states_from_smu()
1051 num_levels = num_entries_per_clk->num_memclk_levels; in dcn32_get_memclk_states_from_smu()
1056 … clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_memclk_levels - 1].memclk_mhz; in dcn32_get_memclk_states_from_smu()
/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
H A Ddcn401_clk_mgr.c86 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_memclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()
327 (clk_mgr_base->bw_params->clk_table.num_entries_per_clk.num_memclk_levels && in dcn401_is_dc_mode_present()
1387 &num_entries_per_clk->num_memclk_levels); in dcn401_get_memclk_states_from_smu()
1388 if (num_entries_per_clk->num_memclk_levels) { in dcn401_get_memclk_states_from_smu()
1390 … clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_memclk_levels - 1].memclk_mhz; in dcn401_get_memclk_states_from_smu()
1394 if (num_entries_per_clk->num_memclk_levels && clk_mgr_base->bw_params->dc_mode_limit.memclk_mhz == in dcn401_get_memclk_states_from_smu()
1395 … clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_memclk_levels - 1].memclk_mhz) in dcn401_get_memclk_states_from_smu()
1407 if (num_entries_per_clk->num_memclk_levels >= num_entries_per_clk->num_fclk_levels) { in dcn401_get_memclk_states_from_smu()
1408 num_levels = num_entries_per_clk->num_memclk_levels; in dcn401_get_memclk_states_from_smu()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn321/
H A Ddcn321_fpu.c403 bw_params->clk_table.num_entries_per_clk.num_memclk_levels = num_uclk_dpms; in build_synthetic_soc_states()
875 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels = in dcn321_update_bw_bounding_box_fpu()
876 dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; in dcn321_update_bw_bounding_box_fpu()
903 for (i = 0; i < dc->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; i++) { in dcn321_update_bw_bounding_box_fpu()
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Dclk_mgr.h132 unsigned int num_memclk_levels; member
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/
H A Ddml21_translation_helper.c146 if (dc_clk_table->num_entries_per_clk.num_memclk_levels) { in override_dml_init_with_values_from_smu()
147 dml_clk_table->uclk.num_clk_values = dc_clk_table->num_entries_per_clk.num_memclk_levels; in override_dml_init_with_values_from_smu()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c1757 …for (int i = 0; i < context->clk_mgr->bw_params->clk_table.num_entries_per_clk.num_memclk_levels; … in dcn401_get_power_profile()
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_translation_helper.c535 …for (i = 0; i < dml2->config.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels; i++)… in dml2_init_soc_states()