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Searched refs:num_mcaches_l (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_shared_types.h614 unsigned int num_mcaches_l[DML2_MAX_PLANES]; member
1080 unsigned int num_mcaches_l[DML2_MAX_PLANES]; member
2231 unsigned int *num_mcaches_l; member
H A Ddml2_core_dcn5_calcs_dchub.c2122 *p->num_mcaches_l = 0; in dcn5_calculate_mcache_setting()
2164 l->l_p.num_mcaches = p->num_mcaches_l; in dcn5_calculate_mcache_setting()
2176 DML_ASSERT(*p->num_mcaches_l > 0); in dcn5_calculate_mcache_setting()
2234 l->avg_mcache_element_size_l = l->meta_row_width_l / *p->num_mcaches_l; in dcn5_calculate_mcache_setting()
2254 DML_LOG_VERBOSE("DML::%s: num_mcaches_l = %u\n", __func__, *p->num_mcaches_l); in dcn5_calculate_mcache_setting()
2275 for (n = 0; n < *p->num_mcaches_l - 1; n++) { in dcn5_calculate_mcache_setting()
2278 p->mcache_offsets_l[*p->num_mcaches_l - 1] = l->full_vp_access_width_l; in dcn5_calculate_mcache_setting()
2286 for (n = 0; n < *p->num_mcaches_l; n++) in dcn5_calculate_mcache_setting()
2297 for (n = 0; n < *p->num_mcaches_l - 1; n++) in dcn5_calculate_mcache_setting()
2299 p->mcache_offsets_l[*p->num_mcaches_l - 1] = l->full_vp_access_width_l; in dcn5_calculate_mcache_setting()
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