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Searched refs:num_instances (Results 1 – 23 of 23) sorted by relevance

/linux/drivers/accel/habanalabs/common/
H A Dsecurity.c308 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_with_mask() argument
325 for (j = 0 ; j < num_instances ; j++) { in hl_init_pb_with_mask()
326 int seq = i * num_instances + j; in hl_init_pb_with_mask()
358 u32 num_instances, u32 instance_offset, in hl_init_pb() argument
363 num_instances, instance_offset, pb_blocks, in hl_init_pb()
386 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_ranges_with_mask() argument
407 for (j = 0 ; j < num_instances ; j++) { in hl_init_pb_ranges_with_mask()
408 int seq = i * num_instances + j; in hl_init_pb_ranges_with_mask()
442 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_ranges() argument
448 num_instances, instance_offset, pb_blocks, in hl_init_pb_ranges()
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/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-nvidia.c37 unsigned int num_instances; member
69 for (i = 0; i < nvidia->num_instances; i++) { in nvidia_smmu_write_reg()
90 for (i = 0; i < nvidia->num_instances; i++) { in nvidia_smmu_write_reg64()
112 for (i = 0; i < nvidia->num_instances; i++) { in nvidia_smmu_tlb_sync()
137 for (i = 0; i < nvidia->num_instances; i++) { in nvidia_smmu_reset()
182 for (inst = 0; inst < nvidia->num_instances; inst++) { in nvidia_smmu_global_fault()
230 for (inst = 0; inst < nvidia->num_instances; inst++) { in nvidia_smmu_context_fault()
323 nvidia_smmu->num_instances++; in nvidia_smmu_impl_init()
334 nvidia_smmu->num_instances++; in nvidia_smmu_impl_init()
337 if (nvidia_smmu->num_instances == 1) in nvidia_smmu_impl_init()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_sdma.c45 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_sdma_get_instance_from_ring()
58 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_get_index_from_ring()
103 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_ras_late_init()
193 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_destroy_inst_ctx()
240 for (i = 1; i < adev->sdma.num_instances; i++) in amdgpu_sdma_init_microcode()
252 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_init_microcode()
371 mask = BIT_ULL(adev->sdma.num_instances * num_ring) - 1; in amdgpu_debugfs_sdma_sched_mask_set()
376 for (i = 0; i < adev->sdma.num_instances; ++i) { in amdgpu_debugfs_sdma_sched_mask_set()
415 for (i = 0; i < adev->sdma.num_instances; ++i) { in amdgpu_debugfs_sdma_sched_mask_get()
450 if (!(adev->sdma.num_instances > 1)) in amdgpu_debugfs_sdma_sched_mask_init()
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H A Dsdma_v4_0.c601 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_setup_ulv()
626 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()
926 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_gfx_enable()
960 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_page_stop()
1009 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_ctx_switch_enable()
1055 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_enable()
1348 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_load_microcode()
1404 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_start()
1434 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_start()
1811 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
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H A Dvpe_v6_1.c78 for (i = 0; i < vpe->num_instances; i++) { in vpe_v6_1_halt()
108 for (i = 0; i < vpe->num_instances; i++) { in vpe_v6_1_set_collaborate_mode()
133 for (j = 0; j < vpe->num_instances; j++) { in vpe_v6_1_load_microcode()
183 for (j = 0; j < vpe->num_instances; j++) { in vpe_v6_1_load_microcode()
215 for (i = 0; i < vpe->num_instances; i++) { in vpe_v6_1_ring_start()
282 for (i = 0; i < vpe->num_instances; i++) { in vpe_v_6_1_ring_stop()
H A Dsdma_v6_0.c399 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_gfx_stop()
435 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_ctxempty_int_enable()
465 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_enable()
567 adev->doorbell_index.sdma_doorbell_range * adev->sdma.num_instances); in sdma_v6_0_gfx_resume_instance()
635 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_gfx_resume()
717 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_load_microcode()
767 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_soft_reset()
802 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_check_soft_reset()
1348 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_sw_init()
1383 ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL); in sdma_v6_0_sw_init()
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H A Dsdma_v7_0.c402 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v7_0_gfx_stop()
457 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v7_0_enable()
562 adev->doorbell_index.sdma_doorbell_range * adev->sdma.num_instances); in sdma_v7_0_gfx_resume_instance()
636 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v7_0_gfx_resume()
663 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v12_0_free_ucode_buffer()
700 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v7_0_load_microcode()
759 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v7_0_soft_reset()
794 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v7_0_check_soft_reset()
811 if (ring->me >= adev->sdma.num_instances) { in sdma_v7_0_reset_queue()
1333 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v7_0_sw_init()
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H A Dsdma_v7_1.c544 adev->doorbell_index.sdma_doorbell_range * adev->sdma.num_instances); in sdma_v7_1_gfx_resume_instance()
785 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v7_1_check_soft_reset()
802 if (ring->me >= adev->sdma.num_instances) { in sdma_v7_1_reset_queue()
1314 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v7_1_sw_init()
1353 ptr = kcalloc(adev->sdma.num_instances * reg_count, sizeof(uint32_t), GFP_KERNEL); in sdma_v7_1_sw_init()
1371 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v7_1_sw_fini()
1390 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v7_1_hw_init()
1423 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v7_1_is_idle()
1440 for (j = 0; j < adev->sdma.num_instances; j++) { in sdma_v7_1_wait_for_idle()
1446 if (j == adev->sdma.num_instances) in sdma_v7_1_wait_for_idle()
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H A Dsdma_v4_4.c243 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_reset_ras_error_count()
256 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_query_ras_error_count()
H A Damdgpu_kms.c324 if (query_fw->index >= adev->sdma.num_instances) in amdgpu_firmware_info()
480 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_hw_ip_info()
752 count = adev->sdma.num_instances; in amdgpu_info_ioctl()
764 count = adev->vpe.num_instances; in amdgpu_info_ioctl()
1908 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_debugfs_firmware_info_show()
H A Damdgpu_dev_coredump.c167 for (int i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_devcoredump_fw_info()
H A Dgfx_v11_0.c5582 if (adev->sdma.num_instances > 1) { in gfx_v11_0_update_coarse_grain_clock_gating()
5616 if (adev->sdma.num_instances > 1) { in gfx_v11_0_update_coarse_grain_clock_gating()
H A Dgfx_v12_0.c4166 if (adev->sdma.num_instances > 1) { in gfx_v12_0_update_coarse_grain_clock_gating()
/linux/drivers/gpu/drm/amd/include/
H A Damdgpu_reg_state.h51 uint8_t num_instances; member
/linux/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-lite.h69 unsigned short num_instances; member
/linux/drivers/hwmon/
H A Dibmaem.c191 u8 num_instances; member
203 u8 num_instances; member
510 return ff_resp.num_instances; in aem_find_aem1_count()
646 fi_resp->num_instances <= instance_num) in aem_find_aem2()
/linux/sound/core/
H A Dtimer.c239 if (master->timer->num_instances >= master->timer->max_instances) in check_matching_master_slave()
242 master->timer->num_instances++; in check_matching_master_slave()
359 if (timer->num_instances >= timer->max_instances) { in snd_timer_open()
388 timer->num_instances++; in snd_timer_open()
414 timer->num_instances--;
449 timer->num_instances--; in snd_timer_close_locked()
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_device.c1500 return node->adev->sdma.num_instances/(int)node->kfd->num_nodes; in kfd_get_num_sdma_engines()
1502 return min(node->adev->sdma.num_instances/(int)node->kfd->num_nodes, 2); in kfd_get_num_sdma_engines()
1508 return node->adev->sdma.num_instances/(int)node->kfd->num_nodes - in kfd_get_num_xgmi_sdma_engines()
/linux/drivers/media/platform/ti/vpe/
H A Dvpe.c377 atomic_t num_instances; /* count of driver instances */ member
2366 if (atomic_inc_return(&dev->num_instances) == 1) in vpe_open()
2429 if (atomic_dec_return(&dev->num_instances) == 0) in vpe_release()
2535 atomic_set(&dev->num_instances, 0); in vpe_probe()
/linux/include/net/bluetooth/
H A Dmgmt.h558 __u8 num_instances; member
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_engine_cs.c905 u8 class, const u8 *map, u8 num_instances) in populate_logical_ids() argument
910 for (j = 0; j < num_instances; ++j) { in populate_logical_ids()
/linux/drivers/net/ethernet/mellanox/mlx4/
H A Dresource_tracker.c426 int vf, int num_instances) in initialize_res_quotas() argument
428 res_alloc->guaranteed[vf] = num_instances / in initialize_res_quotas()
430 res_alloc->quota[vf] = (num_instances / 2) + res_alloc->guaranteed[vf]; in initialize_res_quotas()
432 res_alloc->res_free = num_instances; in initialize_res_quotas()
/linux/net/bluetooth/
H A Dmgmt.c8546 rp->num_instances = hdev->adv_instance_cnt; in read_adv_features()
8555 rp->num_instances--; in read_adv_features()