Searched refs:num_heads (Results 1 – 5 of 5) sorted by relevance
658 u32 num_heads; /* number of active crtcs */ member851 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in dce_v8_0_latency_watermark()852 (wm->num_heads * cursor_line_pair_return_time); in dce_v8_0_latency_watermark()858 if (wm->num_heads == 0) in dce_v8_0_latency_watermark()872 b.full = dfixed_const(wm->num_heads); in dce_v8_0_latency_watermark()907 (dce_v8_0_dram_bandwidth_for_display(wm) / wm->num_heads)) in dce_v8_0_average_bandwidth_vs_dram_bandwidth_for_display()927 (dce_v8_0_available_bandwidth(wm) / wm->num_heads)) in dce_v8_0_average_bandwidth_vs_available_bandwidth()981 u32 lb_size, u32 num_heads) in dce_v8_0_program_watermarks() argument990 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v8_0_program_watermarks()1022 wm_high.num_heads = num_heads; in dce_v8_0_program_watermarks()[all …]
558 u32 num_heads; /* number of active crtcs */ member751 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in dce_v6_0_latency_watermark()752 (wm->num_heads * cursor_line_pair_return_time); in dce_v6_0_latency_watermark()758 if (wm->num_heads == 0) in dce_v6_0_latency_watermark()772 b.full = dfixed_const(wm->num_heads); in dce_v6_0_latency_watermark()807 (dce_v6_0_dram_bandwidth_for_display(wm) / wm->num_heads)) in dce_v6_0_average_bandwidth_vs_dram_bandwidth_for_display()827 (dce_v6_0_available_bandwidth(wm) / wm->num_heads)) in dce_v6_0_average_bandwidth_vs_available_bandwidth()881 u32 lb_size, u32 num_heads) in dce_v6_0_program_watermarks() argument895 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v6_0_program_watermarks()931 wm_high.num_heads = num_heads; in dce_v6_0_program_watermarks()[all …]
705 u32 num_heads; /* number of active crtcs */ member898 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in dce_v10_0_latency_watermark()899 (wm->num_heads * cursor_line_pair_return_time); in dce_v10_0_latency_watermark()905 if (wm->num_heads == 0) in dce_v10_0_latency_watermark()919 b.full = dfixed_const(wm->num_heads); in dce_v10_0_latency_watermark()954 (dce_v10_0_dram_bandwidth_for_display(wm) / wm->num_heads)) in dce_v10_0_average_bandwidth_vs_dram_bandwidth_for_display()974 (dce_v10_0_available_bandwidth(wm) / wm->num_heads)) in dce_v10_0_average_bandwidth_vs_available_bandwidth()1028 u32 lb_size, u32 num_heads) in dce_v10_0_program_watermarks() argument1037 if (amdgpu_crtc->base.enabled && num_heads && mode) { in dce_v10_0_program_watermarks()1069 wm_high.num_heads = num_heads; in dce_v10_0_program_watermarks()[all …]
1944 u32 num_heads; /* number of active crtcs */ member2072 u32 other_heads_data_return_time = ((wm->num_heads + 1) * worst_chunk_return_time) + in evergreen_latency_watermark()2073 (wm->num_heads * cursor_line_pair_return_time); in evergreen_latency_watermark()2078 if (wm->num_heads == 0) in evergreen_latency_watermark()2092 b.full = dfixed_const(wm->num_heads); in evergreen_latency_watermark()2114 (evergreen_dram_bandwidth_for_display(wm) / wm->num_heads)) in evergreen_average_bandwidth_vs_dram_bandwidth_for_display()2123 (evergreen_available_bandwidth(wm) / wm->num_heads)) in evergreen_average_bandwidth_vs_available_bandwidth()2157 u32 lb_size, u32 num_heads) in evergreen_program_watermarks() argument2172 if (radeon_crtc->base.enabled && num_heads && mode) { in evergreen_program_watermarks()2207 wm_high.num_heads = num_heads; in evergreen_program_watermarks()[all …]
230 unsigned long num_heads; member