| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 472 unsigned int num_dwb, in dcn30_mmhubbub_warmup() argument
480 for (i = 0; i < num_dwb; i++) { in dcn30_mmhubbub_warmup()
509 for (i = 0; i < num_dwb; i++) { in dcn30_mmhubbub_warmup()
595 ASSERT(stream->num_wb_info <= dc->res_pool->res_cap->num_dwb); in dcn30_program_all_writeback_pipes_in_tree()
625 ASSERT(wb_info.dwb_pipe_inst < dc->res_pool->res_cap->num_dwb); in dcn30_program_all_writeback_pipes_in_tree()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn303/ |
| H A D | dcn303_resource.c | 129 .num_dwb = 1,
703 uint32_t pipe_count = pool->res_cap->num_dwb;
738 uint32_t pipe_count = pool->res_cap->num_dwb;
1042 for (i = 0; i < pool->res_cap->num_dwb; i++) { in dcn303_resource_destruct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn302/ |
| H A D | dcn302_resource.c | 132 .num_dwb = 1,
742 uint32_t pipe_count = pool->res_cap->num_dwb;
777 uint32_t pipe_count = pool->res_cap->num_dwb;
1098 for (i = 0; i < pool->res_cap->num_dwb; i++) { in dcn302_resource_destruct()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn301/ |
| H A D | dcn301_resource.c | 648 .num_dwb = 1,
1145 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn301_destruct()
1213 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn301_mmhubbub_create()
1237 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn301_dsc_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn316/ |
| H A D | dcn316_resource.c | 833 .num_dwb = 1,
1469 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn316_resource_destruct()
1542 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_mmhubbub_create()
1566 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_dsc_create()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn314/ |
| H A D | dcn314_resource.c | 851 .num_dwb = 1,
1531 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn314_resource_destruct()
1607 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_mmhubbub_create()
1631 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn314_dsc_create()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn315/ |
| H A D | dcn315_resource.c | 838 .num_dwb = 1,
1474 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn315_resource_destruct()
1550 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_mmhubbub_create()
1574 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_dsc_create()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn31/ |
| H A D | dcn31_resource.c | 839 .num_dwb = 1,
1473 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn31_resource_destruct()
1549 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_mmhubbub_create()
1573 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn31_dsc_create()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn36/ |
| H A D | dcn36_resource.c | 678 .num_dwb = 1,
1528 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn36_resource_destruct()
1625 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn35_mmhubbub_create()
1663 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn35_dsc_create()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn35/ |
| H A D | dcn35_resource.c | 691 .num_dwb = 1,
1541 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn35_resource_destruct()
1638 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn35_mmhubbub_create()
1676 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn35_dsc_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn351/ |
| H A D | dcn351_resource.c | 671 .num_dwb = 1,
1521 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn351_resource_destruct()
1618 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn35_mmhubbub_create()
1656 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn35_dsc_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn321/ |
| H A D | dcn321_resource.c | 665 .num_dwb = 1,
1457 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn321_resource_destruct()
1523 uint32_t dwb_count = pool->res_cap->num_dwb; in dcn321_mmhubbub_create()
1551 uint32_t dwb_count = pool->res_cap->num_dwb; in dcn321_dsc_create()
|
| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn20/ |
| H A D | dcn20_resource.c | 690 .num_dwb = 1,
728 .num_dwb = 1, in dcn20_dpp_destroy()
1183 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn20_resource_destruct()
2275 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn20_mmhubbub_create()
2297 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn20_pp_smu_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/ |
| H A D | dcn401_resource.c | 663 .num_dwb = 1,
1483 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn401_resource_destruct()
1549 uint32_t dwb_count = pool->res_cap->num_dwb; in dcn401_dwbc_create()
1579 uint32_t dwb_count = pool->res_cap->num_dwb; in dcn401_mmhubbub_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/ |
| H A D | dcn30_resource.c | 677 .num_dwb = 1,
1174 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn30_resource_destruct()
1253 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn30_mmhubbub_create()
1277 uint32_t pipe_count = pool->res_cap->num_dwb; in dcn30_dsc_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn32/ |
| H A D | dcn32_resource.c | 669 .num_dwb = 1,
1477 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn32_resource_destruct()
1543 uint32_t dwb_count = pool->res_cap->num_dwb; in dcn32_mmhubbub_create()
1571 uint32_t dwb_count = pool->res_cap->num_dwb; in dcn32_dsc_create()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn21/ |
| H A D | dcn21_resource.c | 598 .num_dwb = 1,
747 for (i = 0; i < pool->base.res_cap->num_dwb; i++) { in dcn21_resource_destruct()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| H A D | dcn201_hwseq.c | 333 for (i = 0; i < res_pool->res_cap->num_dwb; i++) in dcn201_init_hw()
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 3211 if (!stream || stream->num_wb_info > dc->res_pool->res_cap->num_dwb) in dcn401_program_all_writeback_pipes_in_tree_sequence()
3242 ASSERT(wb_info->dwb_pipe_inst < dc->res_pool->res_cap->num_dwb); in dcn401_program_all_writeback_pipes_in_tree_sequence()
3269 if (!wb_info->wb_enabled || wb_info->dwb_pipe_inst >= dc->res_pool->res_cap->num_dwb) in dcn401_enable_writeback_sequence()
3302 if (wb_info->dwb_pipe_inst >= dc->res_pool->res_cap->num_dwb) in dcn401_disable_writeback_sequence()
3327 if (!wb_info->wb_enabled || wb_info->dwb_pipe_inst >= dc->res_pool->res_cap->num_dwb) in dcn401_update_writeback_sequence()
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| /linux/drivers/gpu/drm/amd/display/dc/resource/dcn201/ |
| H A D | dcn201_resource.c | 570 .num_dwb = 0,
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| H A D | dcn20_hwseq.c | 3211 for (i = 0; i < res_pool->res_cap->num_dwb; i++) in dcn20_fpga_init_hw()
|