Searched refs:num_dispclk_levels (Results 1 – 6 of 6) sorted by relevance
94 clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dispclk_levels > 1; in dcn401_is_ppclk_dpm_enabled()275 &num_entries_per_clk->num_dispclk_levels); in dcn401_init_clocks()277 …if (num_entries_per_clk->num_dispclk_levels && clk_mgr_base->bw_params->dc_mode_limit.dispclk_mhz … in dcn401_init_clocks()278 …clk_mgr_base->bw_params->clk_table.entries[num_entries_per_clk->num_dispclk_levels - 1].dispclk_mh… in dcn401_init_clocks()288 num_entries_per_clk->num_dispclk_levels) in dcn401_init_clocks()292 for (i = 0; i < num_entries_per_clk->num_dispclk_levels; i++) in dcn401_init_clocks()321 (clk_mgr_base->bw_params->clk_table.num_entries_per_clk.num_dispclk_levels && in dcn401_is_dc_mode_present()1507 num_clk_levels = clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dispclk_levels; in dcn401_get_max_clock_khz()1517 num_clk_levels = clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dispclk_levels; in dcn401_get_max_clock_khz()
135 unsigned int num_dispclk_levels; member
214 &num_entries_per_clk->num_dispclk_levels); in dcn32_init_clocks()215 num_levels = num_entries_per_clk->num_dispclk_levels; in dcn32_init_clocks()233 num_entries_per_clk->num_dispclk_levels) in dcn32_init_clocks()
1139 bw_params->clk_table.num_entries_per_clk.num_dispclk_levels = clock_table->NumDispClkLevelsEnabled; in dcn35_clk_mgr_helper_populate_bw_params()1304 num_clk_levels = clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dispclk_levels; in dcn35_get_max_clock_khz()1314 num_clk_levels = clk_mgr->base.bw_params->clk_table.num_entries_per_clk.num_dispclk_levels; in dcn35_get_max_clock_khz()
411 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dispclk_levels = in dcn351_update_bw_bounding_box_fpu()
378 dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dispclk_levels = in dcn35_update_bw_bounding_box_fpu()