Searched refs:num_compute_rings (Results 1 – 8 of 8) sorted by relevance
199 if (adev->gfx.num_compute_rings > 1 && in amdgpu_gfx_is_high_priority_compute_queue()212 adev->gfx.num_compute_rings); in amdgpu_gfx_compute_queue_acquire()449 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mqd_sw_init()450 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_mqd_sw_init()490 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mqd_sw_fini()491 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_mqd_sw_fini()563 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_disable_kcq()564 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_disable_kcq()580 adev->gfx.num_compute_rings)) { in amdgpu_gfx_disable_kcq()585 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_disable_kcq()[all …]
601 mec_hpd_size = adev->gfx.num_compute_rings * in gfx_v12_1_mec_init()774 ring = &adev->gfx.compute_ring[xcc_id * adev->gfx.num_compute_rings + in gfx_v12_1_compute_ring_init()789 (ring_id + xcc_id * adev->gfx.num_compute_rings) * in gfx_v12_1_compute_ring_init()1140 unsigned num_compute_rings; in gfx_v12_1_sw_init() local1157 if (adev->gfx.num_compute_rings) { in gfx_v12_1_sw_init()1159 num_compute_rings = (adev->gfx.mec.num_pipe_per_mec * in gfx_v12_1_sw_init()1161 adev->gfx.num_compute_rings = min(adev->gfx.num_compute_rings, in gfx_v12_1_sw_init()1162 num_compute_rings); in gfx_v12_1_sw_init()1281 for (i = 0; i < adev->gfx.num_compute_rings * num_xcc; i++) in gfx_v12_1_sw_fini()2462 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v12_1_xcc_kcq_resume()[all …]
793 mec_hpd_size = adev->gfx.num_compute_rings * GFX12_MEC_HPD_SIZE; in gfx_v12_0_mec_init()1399 unsigned num_compute_rings; in gfx_v12_0_sw_init() local1456 if (adev->gfx.num_compute_rings) { in gfx_v12_0_sw_init()1458 num_compute_rings = (adev->gfx.mec.num_pipe_per_mec * in gfx_v12_0_sw_init()1460 adev->gfx.num_compute_rings = min(adev->gfx.num_compute_rings, in gfx_v12_0_sw_init()1461 num_compute_rings); in gfx_v12_0_sw_init()1526 if (adev->gfx.num_compute_rings) { in gfx_v12_0_sw_init()1638 for (i = 0; i < adev->gfx.num_compute_rings; i++) in gfx_v12_0_sw_fini()3475 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v12_0_kcq_resume()3538 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v12_0_cp_resume()[all …]
289 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in suspend_resume_compute_scheduler()
959 mec_hpd_size = adev->gfx.num_compute_rings * GFX11_MEC_HPD_SIZE; in gfx_v11_0_mec_init()1824 if (adev->gfx.num_compute_rings) { in gfx_v11_0_sw_init()1947 for (i = 0; i < adev->gfx.num_compute_rings; i++) in gfx_v11_0_sw_fini()4622 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v11_0_kcq_resume()4700 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v11_0_cp_resume()5206 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v11_0_check_soft_reset()5327 adev->gfx.num_compute_rings = 0; in gfx_v11_0_early_init()5330 adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev), in gfx_v11_0_early_init()6541 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v11_0_eop_irq()6705 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v11_0_handle_priv_fault()[all …]
3096 adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev), in gfx_v6_0_early_init()3148 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v6_0_sw_init()3186 for (i = 0; i < adev->gfx.num_compute_rings; i++) in gfx_v6_0_sw_fini()3578 for (i = 0; i < adev->gfx.num_compute_rings; i++) in gfx_v6_0_set_ring_funcs()
1884 mec_hpd_size = adev->gfx.num_compute_rings * GFX9_MEC_HPD_SIZE; in gfx_v9_0_mec_init()2468 for (i = 0; i < adev->gfx.num_compute_rings; i++) in gfx_v9_0_sw_fini()3932 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v9_0_kcq_resume()3987 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v9_0_cp_resume()4808 adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev), in gfx_v9_0_early_init()6240 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v9_0_eop_irq()6270 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in gfx_v9_0_fault()7687 for (i = 0; i < adev->gfx.num_compute_rings; i++) in gfx_v9_0_set_ring_funcs()
465 for (i = 0; i < adev->gfx.num_compute_rings; i++) in amdgpu_hw_ip_info()