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Searched refs:num_banks (Results 1 – 25 of 33) sorted by relevance

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/linux/drivers/nvmem/
H A Dnintendo-otp.c34 unsigned int num_banks; member
39 .num_banks = 1,
44 .num_banks = 8,
99 config.size = data->num_banks * BANK_SIZE; in nintendo_otp_probe()
/linux/drivers/hwspinlock/
H A Dsun6i_hwspinlock.c96 u32 num_banks; in sun6i_hwspinlock_probe() local
146 num_banks = readl(io_base + SPINLOCK_SYSSTATUS_REG) >> 28; in sun6i_hwspinlock_probe()
147 switch (num_banks) { in sun6i_hwspinlock_probe()
149 priv->nlocks = 1 << (4 + num_banks); in sun6i_hwspinlock_probe()
153 dev_err(&pdev->dev, "unsupported hwspinlock setup (%d)\n", num_banks); in sun6i_hwspinlock_probe()
/linux/drivers/iio/dac/
H A Dad3530r.c100 unsigned int num_banks; member
537 .num_banks = ARRAY_SIZE(ad3530r_if_config),
553 .num_banks = ARRAY_SIZE(ad3530r_if_config),
569 .num_banks = ARRAY_SIZE(ad3530r_if_config),
585 .num_banks = ARRAY_SIZE(ad3530r_if_config),
601 .num_banks = ARRAY_SIZE(ad3532r_if_config),
617 .num_banks = ARRAY_SIZE(ad3532r_if_config),
674 chip_info->num_banks, in ad3530r_setup()
685 chip_info->num_banks, in ad3530r_setup()
697 chip_info->num_banks, in ad3530r_setup()
/linux/drivers/thermal/mediatek/
H A Dauxadc_thermal.c312 s32 num_banks; member
486 .num_banks = MT8173_NUM_ZONES,
526 .num_banks = 1,
557 .num_banks = MT8365_NUM_BANKS,
591 .num_banks = 1,
616 .num_banks = MT7622_NUM_ZONES,
651 .num_banks = MT8183_NUM_ZONES,
676 .num_banks = MT7986_NUM_ZONES,
854 for (i = 0; i < mt->conf->num_banks; i++) { in mtk_read_temp()
1284 for (i = 0; i < mt->conf->num_banks; i++) in mtk_thermal_probe()
/linux/drivers/leds/
H A Dleds-lm3697.c89 int num_banks; member
91 struct lm3697_led leds[] __counted_by(num_banks);
192 for (i = 0; i < priv->num_banks; i++) { in lm3697_init()
317 led->num_banks = count; in lm3697_probe()
/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_transport.c479 u32 num_banks = 0; in adf_init_etr_data() local
487 num_banks = GET_MAX_BANKS(accel_dev); in adf_init_etr_data()
488 size = num_banks * sizeof(struct adf_etr_bank_data); in adf_init_etr_data()
503 for (i = 0; i < num_banks; i++) { in adf_init_etr_data()
546 u32 i, num_banks = GET_MAX_BANKS(accel_dev); in adf_cleanup_etr_handles() local
548 for (i = 0; i < num_banks; i++) in adf_cleanup_etr_handles()
H A Dadf_accel_devices.h353 u8 num_banks; member
391 #define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)
H A Dadf_rl.c221 u16 rp_id_max = GET_HW_DATA(accel_dev)->num_banks; in prepare_rp_ids()
486 rp_per_leaf = hw_device->num_banks / hw_device->num_banks_per_vf; in get_next_free_node_id()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_socbb.h68 uint32_t num_banks; member
/linux/drivers/pinctrl/meson/
H A Dpinctrl-meson.h119 unsigned int num_banks; member
H A Dpinctrl-meson-gxbb.c874 .num_banks = ARRAY_SIZE(meson_gxbb_periphs_banks),
887 .num_banks = ARRAY_SIZE(meson_gxbb_aobus_banks),
H A Dpinctrl-meson8b.c955 .num_banks = ARRAY_SIZE(meson8b_cbus_banks),
968 .num_banks = ARRAY_SIZE(meson8b_aobus_banks),
H A Dpinctrl-meson-axg.c1052 .num_banks = ARRAY_SIZE(meson_axg_periphs_banks),
1066 .num_banks = ARRAY_SIZE(meson_axg_aobus_banks),
H A Dpinctrl-meson8.c1091 .num_banks = ARRAY_SIZE(meson8_cbus_banks),
1104 .num_banks = ARRAY_SIZE(meson8_aobus_banks),
H A Dpinctrl-meson-a1.c915 .num_banks = ARRAY_SIZE(meson_a1_periphs_banks),
H A Dpinctrl-meson.c77 for (i = 0; i < pc->data->num_banks; i++) { in meson_get_bank()
/linux/drivers/edac/
H A Dqcom_edac.c297 for (i = 0; i < drv->num_banks; i++) { in llcc_ecc_irq_handler()
353 llcc_driv_data->num_banks, 1, in qcom_llcc_edac_probe()
/linux/drivers/gpio/
H A Dgpio-eic-sprd.c618 u16 num_banks = 0; in sprd_eic_probe() local
653 num_banks++; in sprd_eic_probe()
657 sprd_eic->chip.ngpio = num_banks * SPRD_EIC_PER_BANK_NR; in sprd_eic_probe()
/linux/drivers/memory/
H A Djedec_ddr.h137 u32 num_banks; member
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_crat.h112 uint8_t num_banks; member
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c244 tiling_info->gfx8.num_banks = AMD_FMT_MOD_GET(NUM_BANKS, modifier); in amdgpu_dm_plane_fill_gfx6_tiling_info_from_modifier()
256 tiling_info->gfx9.num_banks = in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
257 adev->gfx.config.gb_addr_config_fields.num_banks; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_device()
294 tiling_info->gfx9.num_banks = 1u << mod_bank_xor_bits; in amdgpu_dm_plane_fill_gfx9_tiling_info_from_modifier()
743 ilog2(adev->gfx.config.gb_addr_config_fields.num_banks)); in amdgpu_dm_plane_add_gfx9_modifiers()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddisplay_mode_structs.h230 unsigned int num_banks; member
/linux/drivers/media/i2c/
H A Dthp7312.c1655 unsigned int num_banks; in thp7312_fw_load_to_ram() local
1658 num_banks = DIV_ROUND_UP(size, THP7312_RAM_BANK_SIZE); in thp7312_fw_load_to_ram()
1661 size, num_banks); in thp7312_fw_load_to_ram()
1663 for (i = 0; i < num_banks; i++) { in thp7312_fw_load_to_ram()
/linux/drivers/net/ethernet/marvell/octeontx2/af/cn20k/
H A Dnpc.c2648 if (midx >= npc_priv->bank_depth * npc_priv->num_banks) { in npc_idx_free()
4657 int blkaddr, num_banks, bank_depth; in npc_priv_init() local
4676 num_banks = mcam->banks; in npc_priv_init()
4677 if (!num_banks || num_banks > MAX_NUM_BANKS) { in npc_priv_init()
4679 "Number of banks(%u) is invalid\n", num_banks); in npc_priv_init()
4718 npc_priv->num_banks = num_banks; in npc_priv_init()
4729 num_banks, bank_depth, num_subbanks, subbank_depth, in npc_priv_init()
/linux/drivers/clk/
H A Dclk-versaclock7.c112 const unsigned int num_banks; member
1262 .num_banks = 6,

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