| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | umc_v8_10.c | 71 uint32_t node_inst, in get_umc_v8_10_reg_offset() argument
76 UMC_8_NODE_DIST * node_inst; in get_umc_v8_10_reg_offset()
80 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_clear_error_count_per_channel() argument
85 get_umc_v8_10_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v8_10_clear_error_count_per_channel()
144 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_query_ecc_error_count() argument
149 get_umc_v8_10_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v8_10_query_ecc_error_count()
208 uint32_t node_inst, uint64_t mc_umc_status) in umc_v8_10_convert_error_address() argument
216 adev->umc.channel_idx_tbl[node_inst * adev->umc.umc_inst_num * in umc_v8_10_convert_error_address()
245 uint32_t node_inst, uint32_t umc_inst, in umc_v8_10_query_error_address() argument
253 get_umc_v8_10_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v8_10_query_error_address()
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| H A D | umc_v12_0.c | 35 uint32_t node_inst, in get_umc_v12_0_reg_offset() argument
40 uint64_t cross_node_offset = (node_inst == 0) ? 0 : UMC_V12_0_CROSS_NODE_OFFSET; in get_umc_v12_0_reg_offset()
46 UMC_V12_0_NODE_DIST * node_inst + cross_node_offset; in get_umc_v12_0_reg_offset()
50 uint32_t node_inst, uint32_t umc_inst, in umc_v12_0_reset_error_count_per_channel() argument
55 get_umc_v12_0_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v12_0_reset_error_count_per_channel()
138 uint32_t node_inst, uint32_t umc_inst, in umc_v12_0_query_error_count() argument
148 .die_id = node_inst, in umc_v12_0_query_error_count()
152 get_umc_v12_0_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v12_0_query_error_count()
327 uint32_t node_inst, uint32_t umc_inst, in umc_v12_0_query_error_address() argument
336 get_umc_v12_0_reg_offset(adev, node_inst, umc_inst, ch_inst); in umc_v12_0_query_error_address()
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| H A D | amdgpu_umc.c | 434 uint32_t node_inst; in amdgpu_umc_loop_all_aid() local
450 node_inst = umc_node_inst / adev->umc.umc_inst_num; in amdgpu_umc_loop_all_aid()
455 node_inst, umc_inst, ch_inst); in amdgpu_umc_loop_all_aid()
456 ret = func(adev, node_inst, umc_inst, ch_inst, data); in amdgpu_umc_loop_all_aid()
460 node_inst, umc_inst, ch_inst, ret); in amdgpu_umc_loop_all_aid()
472 uint32_t node_inst = 0; in amdgpu_umc_loop_channels() local
481 LOOP_UMC_EACH_NODE_INST_AND_CH(node_inst, umc_inst, ch_inst) { in amdgpu_umc_loop_channels()
482 ret = func(adev, node_inst, umc_inst, ch_inst, data); in amdgpu_umc_loop_channels()
485 node_inst, umc_inst, ch_inst, ret); in amdgpu_umc_loop_channels()
591 addr_in.ma.node_inst = node; in amdgpu_umc_mca_to_addr()
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| H A D | umc_v8_14.c | 38 uint32_t node_inst, uint32_t umc_inst, in umc_v8_14_clear_error_count_per_channel() argument
93 uint32_t node_inst, uint32_t umc_inst, in umc_v8_14_query_error_count_per_channel() argument
120 uint32_t node_inst, uint32_t umc_inst, in umc_v8_14_err_cnt_init_per_channel() argument
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| H A D | umc_v6_7.c | 164 uint32_t node_inst, uint32_t umc_inst, in umc_v6_7_ecc_info_querry_ecc_error_count() argument
223 uint32_t node_inst, uint32_t umc_inst, in umc_v6_7_ecc_info_query_error_address() argument
362 uint32_t node_inst, uint32_t umc_inst, in umc_v6_7_reset_error_count_per_channel() argument
413 uint32_t node_inst, uint32_t umc_inst, in umc_v6_7_query_ecc_error_count() argument
442 uint32_t node_inst, uint32_t umc_inst, in umc_v6_7_query_error_address() argument
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| H A D | amdgpu_ras.c | 3032 addr_in.ma.node_inst = TA_RAS_INV_NODE; in amdgpu_ras_mca2pa_by_idx()
3035 addr_in.ma.node_inst = bps->cu; in amdgpu_ras_mca2pa_by_idx()
3072 addr_in.ma.node_inst = die_id; in amdgpu_ras_mca2pa()
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| /linux/drivers/gpu/drm/amd/ras/rascore/ |
| H A D | ras_umc.c | 102 addr_in.ma.node_inst = in->node_inst; in ras_umc_psp_convert_ma_to_pa()
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