Searched refs:new_clocks (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| H A D | dcn201_clk_mgr.c | 89 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn201_update_clocks() local
116 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) in dcn201_update_clocks()
117 clk_mgr_base->clks.phyclk_khz = new_clocks->phyclk_khz; in dcn201_update_clocks()
120 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn201_update_clocks()
121 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn201_update_clocks()
123 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks()
124 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn201_update_clocks()
127 new_clocks->dcfclk_deep_sleep_khz, clk_mgr_base->clks.dcfclk_deep_sleep_khz)) in dcn201_update_clocks()
128 clk_mgr_base->clks.dcfclk_deep_sleep_khz = new_clocks->dcfclk_deep_sleep_khz; in dcn201_update_clocks()
130 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn201_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| H A D | dcn35_clk_mgr.c | 358 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn35_notify_host_router_bw() local
383 new_clocks->host_router_bw_kbps[i] = host_router_bw_kbps[i]; in dcn35_notify_host_router_bw()
384 …if (should_set_clock(safe_to_lower, new_clocks->host_router_bw_kbps[i], clk_mgr_base->clks.host_ro… in dcn35_notify_host_router_bw()
385 clk_mgr_base->clks.host_router_bw_kbps[i] = new_clocks->host_router_bw_kbps[i]; in dcn35_notify_host_router_bw()
386 dcn35_smu_notify_host_router_bw(clk_mgr, i, new_clocks->host_router_bw_kbps[i]); in dcn35_notify_host_router_bw()
397 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn35_update_clocks() local
409 if (new_clocks->dtbclk_en && !new_clocks->ref_dtbclk_khz) in dcn35_update_clocks()
410 new_clocks->ref_dtbclk_khz = 600000; in dcn35_update_clocks()
411 else if (!new_clocks->dtbclk_en && new_clocks->ref_dtbclk_khz > 590000) in dcn35_update_clocks()
412 new_clocks->ref_dtbclk_khz = 0; in dcn35_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| H A D | dcn31_clk_mgr.c | 143 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn31_update_clocks() local
158 if (new_clocks->zstate_support != DCN_ZSTATE_SUPPORT_DISALLOW && in dcn31_update_clocks()
159 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn31_update_clocks()
160 dcn31_smu_set_zstate_support(clk_mgr, new_clocks->zstate_support); in dcn31_update_clocks()
161 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn31_update_clocks()
164 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn31_update_clocks()
166 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn31_update_clocks()
183 if (new_clocks->zstate_support == DCN_ZSTATE_SUPPORT_DISALLOW && in dcn31_update_clocks()
184 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn31_update_clocks()
186 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn31_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| H A D | dcn314_clk_mgr.c | 214 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; in dcn314_update_clocks() local
230 if (new_clocks->zstate_support != DCN_ZSTATE_SUPPORT_DISALLOW && in dcn314_update_clocks()
231 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn314_update_clocks()
232 dcn314_smu_set_zstate_support(clk_mgr, new_clocks->zstate_support); in dcn314_update_clocks()
233 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn314_update_clocks()
236 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn314_update_clocks()
238 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn314_update_clocks()
254 if (new_clocks->zstate_support == DCN_ZSTATE_SUPPORT_DISALLOW && in dcn314_update_clocks()
255 new_clocks->zstate_support != clk_mgr_base->clks.zstate_support) { in dcn314_update_clocks()
257 clk_mgr_base->clks.zstate_support = new_clocks->zstate_support; in dcn314_update_clocks()
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