Searched refs:new_cdclk_state (Results 1 – 2 of 2) sorted by relevance
2586 const struct intel_cdclk_state *new_cdclk_state = in intel_cdclk_pcode_pre_notify() local2592 &new_cdclk_state->actual) && in intel_cdclk_pcode_pre_notify()2593 new_cdclk_state->active_pipes == in intel_cdclk_pcode_pre_notify()2600 change_cdclk = new_cdclk_state->actual.cdclk != old_cdclk_state->actual.cdclk; in intel_cdclk_pcode_pre_notify()2601 update_pipe_count = hweight8(new_cdclk_state->active_pipes) > in intel_cdclk_pcode_pre_notify()2611 cdclk = max(new_cdclk_state->actual.cdclk, old_cdclk_state->actual.cdclk); in intel_cdclk_pcode_pre_notify()2620 num_active_pipes = hweight8(new_cdclk_state->active_pipes); in intel_cdclk_pcode_pre_notify()2629 const struct intel_cdclk_state *new_cdclk_state = in intel_cdclk_pcode_post_notify() local2637 voltage_level = new_cdclk_state->actual.voltage_level; in intel_cdclk_pcode_post_notify()2639 update_cdclk = new_cdclk_state->actual.cdclk != old_cdclk_state->actual.cdclk; in intel_cdclk_pcode_post_notify()[all …]
297 const struct intel_cdclk_state *new_cdclk_state, *old_cdclk_state; in intel_pmdemand_needs_update() local322 new_cdclk_state = intel_atomic_get_new_cdclk_state(state); in intel_pmdemand_needs_update()324 if (new_cdclk_state && in intel_pmdemand_needs_update()325 (new_cdclk_state->actual.cdclk != in intel_pmdemand_needs_update()327 new_cdclk_state->actual.voltage_level != in intel_pmdemand_needs_update()343 const struct intel_cdclk_state *new_cdclk_state; in intel_pmdemand_atomic_check() local379 new_cdclk_state = intel_atomic_get_cdclk_state(state); in intel_pmdemand_atomic_check()380 if (IS_ERR(new_cdclk_state)) in intel_pmdemand_atomic_check()381 return PTR_ERR(new_cdclk_state); in intel_pmdemand_atomic_check()384 new_cdclk_state->actual.voltage_level; in intel_pmdemand_atomic_check()[all …]