Home
last modified time | relevance | path

Searched refs:nbio (Results 1 – 25 of 39) sorted by relevance

12

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsoc24.c94 return adev->nbio.funcs->get_memsize(adev); in soc24_get_config_memsize()
230 (adev->nbio.funcs->program_aspm)) in soc24_program_aspm()
231 adev->nbio.funcs->program_aspm(adev); in soc24_program_aspm()
335 adev->nbio.funcs->set_reg_remap(adev); in soc24_common_early_init()
409 if (adev->nbio.ras && in soc24_common_late_init()
410 adev->nbio.ras_err_event_athub_irq.funcs) in soc24_common_late_init()
416 amdgpu_irq_get(adev, &adev->nbio.ras_err_event_athub_irq, 0); in soc24_common_late_init()
422 adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, true); in soc24_common_late_init()
444 adev->nbio.funcs->init_registers(adev); in soc24_common_hw_init()
449 if (adev->nbio.funcs->remap_hdp_registers) in soc24_common_hw_init()
[all …]
H A Dsoc21.c255 return adev->nbio.funcs->get_memsize(adev); in soc21_get_config_memsize()
373 u32 memsize = adev->nbio.funcs->get_memsize(adev);
556 adev->nbio.funcs->set_reg_remap(adev); in soc21_common_early_init()
937 if (adev->nbio.ras && in soc21_common_late_init()
938 adev->nbio.ras_err_event_athub_irq.funcs) in soc21_common_late_init()
943 amdgpu_irq_get(adev, &adev->nbio.ras_err_event_athub_irq, 0); in soc21_common_late_init()
949 adev->nbio.funcs->enable_doorbell_selfring_aperture(adev, true); in soc21_common_late_init()
971 adev->nbio.funcs->init_registers(adev); in soc21_common_hw_init()
976 if (adev->nbio.funcs->remap_hdp_registers && !amdgpu_sriov_vf(adev)) in soc21_common_hw_init()
977 adev->nbio.funcs->remap_hdp_registers(adev); in soc21_common_hw_init()
[all …]
H A Dnbio_v7_9.c521 struct ras_manager *obj = amdgpu_ras_find_obj(adev, adev->nbio.ras_if); in nbio_v7_9_handle_ras_controller_intr_no_bifring()
554 get_ras_block_str(adev->nbio.ras_if)); in nbio_v7_9_handle_ras_controller_intr_no_bifring()
560 get_ras_block_str(adev->nbio.ras_if)); in nbio_v7_9_handle_ras_controller_intr_no_bifring()
648 adev->nbio.ras_controller_irq.funcs = in nbio_v7_9_init_ras_controller_interrupt()
650 adev->nbio.ras_controller_irq.num_types = 1; in nbio_v7_9_init_ras_controller_interrupt()
655 &adev->nbio.ras_controller_irq); in nbio_v7_9_init_ras_controller_interrupt()
666 adev->nbio.ras_err_event_athub_irq.funcs = in nbio_v7_9_init_ras_err_event_athub_interrupt()
668 adev->nbio.ras_err_event_athub_irq.num_types = 1; in nbio_v7_9_init_ras_err_event_athub_interrupt()
673 &adev->nbio.ras_err_event_athub_irq); in nbio_v7_9_init_ras_err_event_athub_interrupt()
H A Dhdp_v5_2.c44 if (adev->nbio.funcs->get_memsize) in hdp_v5_2_flush_hdp()
45 adev->nbio.funcs->get_memsize(adev); in hdp_v5_2_flush_hdp()
H A Damdgpu_discovery.c3443 adev->nbio.funcs = &nbio_v6_1_funcs; in amdgpu_discovery_set_ip_blocks()
3444 adev->nbio.hdp_flush_reg = &nbio_v6_1_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
3449 adev->nbio.funcs = &nbio_v7_0_funcs; in amdgpu_discovery_set_ip_blocks()
3450 adev->nbio.hdp_flush_reg = &nbio_v7_0_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
3455 adev->nbio.funcs = &nbio_v7_4_funcs; in amdgpu_discovery_set_ip_blocks()
3456 adev->nbio.hdp_flush_reg = &nbio_v7_4_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
3460 adev->nbio.funcs = &nbio_v7_9_funcs; in amdgpu_discovery_set_ip_blocks()
3461 adev->nbio.hdp_flush_reg = &nbio_v7_9_hdp_flush_reg; in amdgpu_discovery_set_ip_blocks()
3467 adev->nbio.funcs = &nbio_v7_11_funcs; in amdgpu_discovery_set_ip_blocks()
3468 adev->nbio in amdgpu_discovery_set_ip_blocks()
[all...]
H A Dnbif_v6_3_1.c717 adev->nbio.ras_err_event_athub_irq.funcs = in nbif_v6_3_1_init_ras_err_event_athub_interrupt()
719 adev->nbio.ras_err_event_athub_irq.num_types = 1; in nbif_v6_3_1_init_ras_err_event_athub_interrupt()
726 &adev->nbio.ras_err_event_athub_irq); in nbif_v6_3_1_init_ras_err_event_athub_interrupt()
H A Dih_v6_1.c306 adev->nbio.funcs->ih_control(adev); in ih_v6_1_irq_init()
327 adev->nbio.funcs->ih_doorbell_range(adev, ih[0]->use_doorbell, in ih_v6_1_irq_init()
H A Dsdma_v7_0.c331 const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg; in sdma_v7_0_ring_emit_hdp_flush()
338 amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2); in sdma_v7_0_ring_emit_hdp_flush()
339 amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2); in sdma_v7_0_ring_emit_hdp_flush()
560 adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell, in sdma_v7_0_gfx_resume_instance()
H A Dsdma_v6_0.c329 const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg; in sdma_v6_0_ring_emit_hdp_flush()
336 amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2); in sdma_v6_0_ring_emit_hdp_flush()
337 amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2); in sdma_v6_0_ring_emit_hdp_flush()
566 adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell, in sdma_v6_0_gfx_resume_instance()
H A Dsdma_v5_0.c492 const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg; in sdma_v5_0_ring_emit_hdp_flush()
502 amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2); in sdma_v5_0_ring_emit_hdp_flush()
503 amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2); in sdma_v5_0_ring_emit_hdp_flush()
781 adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell, in sdma_v5_0_gfx_resume_instance()
H A Dsdma_v5_2.c341 const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg; in sdma_v5_2_ring_emit_hdp_flush()
351 amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_done_offset(adev)) << 2); in sdma_v5_2_ring_emit_hdp_flush()
352 amdgpu_ring_write(ring, (adev->nbio.funcs->get_hdp_flush_req_offset(adev)) << 2); in sdma_v5_2_ring_emit_hdp_flush()
625 adev->nbio.funcs->sdma_doorbell_range(adev, i, ring->use_doorbell, in sdma_v5_2_gfx_resume_instance()
H A Damdgpu_device.c937 return adev->nbio.funcs->get_rev_id(adev); in amdgpu_device_get_rev_id()
4979 u32 memsize = adev->nbio.funcs->get_memsize(adev); in amdgpu_device_mode1_reset()
6148 adev->nbio.funcs->enable_doorbell_interrupt) in amdgpu_device_baco_enter()
6149 adev->nbio.funcs->enable_doorbell_interrupt(adev, false); in amdgpu_device_baco_enter()
6167 adev->nbio.funcs->enable_doorbell_interrupt) in amdgpu_device_baco_exit()
6168 adev->nbio.funcs->enable_doorbell_interrupt(adev, true); in amdgpu_device_baco_exit()
6170 if (amdgpu_passthrough(adev) && adev->nbio.funcs && in amdgpu_device_baco_exit()
6171 adev->nbio.funcs->clear_doorbell_interrupt) in amdgpu_device_baco_exit()
6172 adev->nbio.funcs->clear_doorbell_interrupt(adev); in amdgpu_device_baco_exit()
H A Damdgpu_gmc.c1559 if (adev->nbio.funcs && in amdgpu_gmc_get_memory_partition()
1560 adev->nbio.funcs->get_memory_partition_mode) in amdgpu_gmc_get_memory_partition()
1561 mode = adev->nbio.funcs->get_memory_partition_mode(adev, in amdgpu_gmc_get_memory_partition()
H A Dvpe_v6_1.c258 adev->nbio.funcs->vpe_doorbell_range(adev, i, ring->use_doorbell, ring->doorbell_index + i*4, 4); in vpe_v6_1_ring_start()
H A Damdgpu_mes.c679 hdp_flush_req_offset = adev->nbio.funcs->get_hdp_flush_req_offset(adev); in amdgpu_mes_hdp_flush()
680 hdp_flush_done_offset = adev->nbio.funcs->get_hdp_flush_done_offset(adev); in amdgpu_mes_hdp_flush()
H A Dumsch_mm_v4_0.c225 adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, in umsch_mm_v4_0_ring_start()
H A Dsdma_v4_4_2.c428 const struct nbio_hdp_flush_reg *nbio_hf_reg = adev->nbio.hdp_flush_reg; in sdma_v4_4_2_ring_emit_hdp_flush()
434 adev->nbio.funcs->get_hdp_flush_done_offset(adev), in sdma_v4_4_2_ring_emit_hdp_flush()
435 adev->nbio.funcs->get_hdp_flush_req_offset(adev), in sdma_v4_4_2_ring_emit_hdp_flush()
H A Djpeg_v4_0.c198 adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, in jpeg_v4_0_hw_init()
H A Djpeg_v4_0_5.c515 adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, in jpeg_v4_0_5_start()
H A Dgmc_v11_0.c689 adev->nbio.funcs->get_memsize(adev) * 1024ULL * 1024ULL; in gmc_v11_0_mc_init()
H A Djpeg_v5_0_1.c295 adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, in jpeg_v5_0_1_hw_init()
H A Damdgpu.h742 struct amdgpu_nbio nbio; member
H A Dvcn_v5_0_0.c264 adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, in vcn_v5_0_0_hw_init()
/linux/drivers/block/xen-blkback/
H A Dblkback.c1298 int i, nbio = 0; in dispatch_rw_block_io() local
1436 biolist[nbio++] = bio; in dispatch_rw_block_io()
1451 biolist[nbio++] = bio; in dispatch_rw_block_io()
1456 atomic_set(&pending_req->pendcnt, nbio); in dispatch_rw_block_io()
1459 for (i = 0; i < nbio; i++) in dispatch_rw_block_io()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu15/
H A Dsmu_v15_0_0_ppt.c283 if (!ret && adev->nbio.funcs && adev->nbio.funcs->mc_access_enable) in smu_v15_0_0_system_features_control()
284 adev->nbio.funcs->mc_access_enable(adev, true); in smu_v15_0_0_system_features_control()

12