Searched refs:native_420 (Results 1 – 6 of 6) sorted by relevance
52 pps->native_420 ? CM_420 : CM_444)); in calc_rc_params()56 is_navite_422_or_420 = pps->native_422 || pps->native_420; in calc_rc_params()
38 to->native_420 = from->native_420; in copy_pps_fields()
116 intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp()118 intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp()167 if (vdsc_cfg->native_420) { in calculate_rc_params()197 if (vdsc_cfg->native_420) { in calculate_rc_params()353 vdsc_cfg->native_420 = true; in intel_dsc_compute_params()366 if (vdsc_cfg->native_420) in intel_dsc_compute_params()544 if (vdsc_cfg->native_420) in intel_dsc_pps_configure()985 vdsc_cfg->native_420 = pps_temp & DSC_PPS0_NATIVE_420_ENABLE; in intel_dsc_get_pps_config()993 if (vdsc_cfg->native_420) in intel_dsc_get_pps_config()
5445 PIPE_CONF_CHECK_BOOL(dsc.config.native_420); in intel_pipe_config_compare()
253 bool native_420; member
321 DC_LOG_DSC("\tnative_420 %d", pps->native_420); in dsc_log_pps()437 dsc_reg_vals->pps.native_420 = (dsc_reg_vals->pixel_format == DSC_PIXFMT_NATIVE_YCBCR420); in dsc_prepare_config()