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Searched refs:myPipe (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/
H A Ddml2_core_dcn5_calcs_dchub.c1331 …2_core_utils_is_420(p->myPipe[k].SourcePixelFormat) || dml2_core_utils_is_422_planar(p->myPipe[k].… in dcn5_calculate_vm_row_and_swath()
1332 …if ((p->myPipe[k].SourcePixelFormat == dml2_420_10 || p->myPipe[k].SourcePixelFormat == dml2_420_12 in dcn5_calculate_vm_row_and_swath()
1333 …|| p->myPipe[k].SourcePixelFormat == dml2_422_planar_10 || p->myPipe[k].SourcePixelFormat == dml2_… in dcn5_calculate_vm_row_and_swath()
1334 && !dml2_core_utils_is_vertical_rotation(p->myPipe[k].RotationAngle)) { in dcn5_calculate_vm_row_and_swath()
1342 scratch->calculate_vm_and_row_bytes_params.ViewportStationary = p->myPipe[k].ViewportStationary; in dcn5_calculate_vm_row_and_swath()
1343 scratch->calculate_vm_and_row_bytes_params.DCCEnable = p->myPipe[k].DCCEnable; in dcn5_calculate_vm_row_and_swath()
1344 scratch->calculate_vm_and_row_bytes_params.NumberOfDPPs = p->myPipe[k].DPPPerSurface; in dcn5_calculate_vm_row_and_swath()
1345 …scratch->calculate_vm_and_row_bytes_params.BlockHeight256Bytes = p->myPipe[k].BlockHeight256BytesC; in dcn5_calculate_vm_row_and_swath()
1346 scratch->calculate_vm_and_row_bytes_params.BlockWidth256Bytes = p->myPipe[k].BlockWidth256BytesC; in dcn5_calculate_vm_row_and_swath()
1347 scratch->calculate_vm_and_row_bytes_params.SourcePixelFormat = p->myPipe[k].SourcePixelFormat; in dcn5_calculate_vm_row_and_swath()
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H A Ddml2_core_dcn5_funcs_mode_programming.c350 CalculateVMRowAndSwath_params->myPipe = s->SurfaceParameters; in dcn5_mode_programming()
629 struct dml2_core_internal_DmlPipe *myPipe = &s->myPipe; in dcn5_mode_programming() local
639 myPipe->Dppclk = mode_lib->mp.Dppclk[k]; in dcn5_mode_programming()
640 myPipe->Dispclk = mode_lib->mp.Dispclk; in dcn5_mode_programming()
641 …myPipe->PixelClock = ((double)display_cfg->stream_descriptors[display_cfg->plane_descriptors[k].st… in dcn5_mode_programming()
642 myPipe->DCFClkDeepSleep = mode_lib->mp.DCFCLKDeepSleep; in dcn5_mode_programming()
643 myPipe->DPPPerSurface = mode_lib->mp.NoOfDPP[k]; in dcn5_mode_programming()
644 myPipe->ScalerEnabled = display_cfg->plane_descriptors[k].composition.scaler_info.enabled; in dcn5_mode_programming()
645 myPipe->VRatio = display_cfg->plane_descriptors[k].composition.scaler_info.plane0.v_ratio; in dcn5_mode_programming()
646 myPipe->VRatioChroma = display_cfg->plane_descriptors[k].composition.scaler_info.plane1.v_ratio; in dcn5_mode_programming()
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H A Ddml2_core_shared_types.h1149 struct dml2_core_internal_DmlPipe myPipe; member
1272 struct dml2_core_internal_DmlPipe myPipe; member
1387 struct dml2_core_internal_DmlPipe *myPipe; member
1997 struct dml2_core_internal_DmlPipe *myPipe; member
/linux/drivers/gpu/drm/amd/display/dc/dml2_0/
H A Ddisplay_mode_core_structs.h1392 struct DmlPipe *myPipe; member
1587 struct DmlPipe *myPipe; member
1662 struct DmlPipe myPipe; member
1747 struct DmlPipe myPipe; member