Home
last modified time | relevance | path

Searched refs:mux_width (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/clk/rockchip/
H A Dclk-ddr.c20 int mux_width; member
79 val &= GENMASK(ddrclk->mux_width - 1, 0); in rockchip_ddrclk_get_parent()
94 int mux_shift, int mux_width, in rockchip_clk_register_ddrclk() argument
129 ddrclk->mux_width = mux_width; in rockchip_clk_register_ddrclk()
H A Dclk.c42 int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, in rockchip_clk_register_branch() argument
64 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_branch()
271 frac_mux->mask = BIT(child->mux_width) - 1; in rockchip_clk_register_frac_branch()
532 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
540 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
547 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
579 list->mux_shift, list->mux_width, in rockchip_clk_register_branches()
605 list->mux_width, list->mux_flags, in rockchip_clk_register_branches()
650 list->mux_width, list->div_shift, in rockchip_clk_register_branches()
735 list->mux_width, list->mux_flags, in rockchip_clk_register_armclk_multi_pll()
H A Dclk.h708 u8 mux_width, u8 mux_flags,
730 int mux_shift, int mux_width,
780 u8 mux_width; member
807 .mux_width = mw, \
828 .mux_width = mw, \
887 .mux_width = mw, \
905 .mux_width = mw, \
924 .mux_width = mw, \
995 .mux_width = mw, \
1012 .mux_width = w, \
[all …]
H A Dclk-half-divider.c164 u8 mux_width, u8 mux_flags, in rockchip_clk_register_halfdiv() argument
185 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_halfdiv()
H A Dclk-cpu.c467 u8 mux_width, u8 mux_flags, in rockchip_clk_register_cpuclk_multi_pll() argument
488 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_cpuclk_multi_pll()
/linux/drivers/clk/mediatek/
H A Dclk-mtk.h103 signed char mux_width; member
120 .mux_width = _width, \
156 .mux_width = _width, \
188 .mux_width = _mux_width, \
H A Dclk-mux.h38 u8 mux_width; member
58 .mux_width = _width, \
145 .mux_width = _width, \
178 .mux_width = _width, \
H A Dclk-mux.c163 u32 mask = GENMASK(mux->data->mux_width - 1, 0); in mtk_clk_mux_get_parent()
186 u32 mask = GENMASK(mux->data->mux_width - 1, 0); in mtk_clk_mux_set_parent_setclr_lock()
H A Dclk-cpumux.c81 cpumux->mask = BIT(mux->mux_width) - 1; in mtk_clk_register_cpumux()
H A Dclk-mtk.c238 mux->mask = BIT(mc->mux_width) - 1; in mtk_clk_register_composite()
/linux/drivers/clk/x86/
H A Dclk-cgu.h178 u8 mux_width; member
214 .mux_width = _width, \