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Searched refs:mul (Results 1 – 25 of 84) sorted by relevance

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/linux/drivers/clk/
H A Dclk-vt8500.c456 u32 mul; in wm8750_find_pll_bits() local
465 for (mul = 0; mul <= 255; mul++) { in wm8750_find_pll_bits()
466 tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2)); in wm8750_find_pll_bits()
473 *multiplier = mul; in wm8750_find_pll_bits()
481 *multiplier = mul; in wm8750_find_pll_bits()
504 u32 mul; in wm8850_find_pll_bits() local
513 for (mul = 0; mul <= 127; mul++) { in wm8850_find_pll_bits()
514 tclk = parent_rate * ((mul + 1) * 2) / in wm8850_find_pll_bits()
521 *multiplier = mul; in wm8850_find_pll_bits()
529 *multiplier = mul; in wm8850_find_pll_bits()
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H A Dclk-cdce706.c73 unsigned mul; member
170 __func__, hwd->idx, hwd->mux, hwd->mul, hwd->div); in cdce706_pll_recalc_rate()
173 if (hwd->div && hwd->mul) { in cdce706_pll_recalc_rate()
174 u64 res = (u64)parent_rate * hwd->mul; in cdce706_pll_recalc_rate()
190 unsigned long mul, div; in cdce706_pll_determine_rate() local
199 &mul, &div); in cdce706_pll_determine_rate()
200 hwd->mul = mul; in cdce706_pll_determine_rate()
205 __func__, hwd->idx, mul, div); in cdce706_pll_determine_rate()
207 res = (u64)req->best_parent_rate * hwd->mul; in cdce706_pll_determine_rate()
218 unsigned long mul = hwd->mul, div = hwd->div; in cdce706_pll_set_rate() local
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H A Dclk-moxart.c21 unsigned int mul; in moxart_of_pll_clk_init() local
34 mul = readl(base + 0x30) >> 3 & 0x3f; in moxart_of_pll_clk_init()
43 hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1); in moxart_of_pll_clk_init()
/linux/drivers/clk/actions/
H A Dowl-factor.c28 unsigned int val, unsigned int *mul, unsigned int *div) in _get_table_div_mul() argument
34 *mul = clkt->mul; in _get_table_div_mul()
51 calc_rate = parent_rate * clkt->mul; in _get_table_val()
85 try_parent_rate = rate * clkt->div / clkt->mul; in owl_clk_val_best()
89 __func__, clkt->val, clkt->mul, clkt->div, in owl_clk_val_best()
102 cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul; in owl_clk_val_best()
125 unsigned int val, mul = 0, div = 1; in owl_factor_helper_round_rate() local
128 _get_table_div_mul(clkt, val, &mul, &div); in owl_factor_helper_round_rate()
130 return *parent_rate * mul / div; in owl_factor_helper_round_rate()
151 u32 reg, val, mul, div; in owl_factor_helper_recalc_rate() local
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H A Dowl-pll.c20 u32 mul; in owl_pll_calculate_mul() local
22 mul = DIV_ROUND_CLOSEST(rate, pll_hw->bfreq); in owl_pll_calculate_mul()
23 if (mul < pll_hw->min_mul) in owl_pll_calculate_mul()
24 mul = pll_hw->min_mul; in owl_pll_calculate_mul()
25 else if (mul > pll_hw->max_mul) in owl_pll_calculate_mul()
26 mul = pll_hw->max_mul; in owl_pll_calculate_mul()
28 return mul & mul_mask(pll_hw); in owl_pll_calculate_mul()
65 u32 mul; in owl_pll_determine_rate() local
81 mul = owl_pll_calculate_mul(pll_hw, req->rate); in owl_pll_determine_rate()
83 req->rate = pll_hw->bfreq * mul; in owl_pll_determine_rate()
/linux/drivers/clk/tegra/
H A Dclk-utils.c16 int mul; in div_frac_get() local
21 mul = 1 << frac_width; in div_frac_get()
24 divider_ux1 *= mul; in div_frac_get()
32 divider_ux1 *= mul; in div_frac_get()
34 if (divider_ux1 < mul) in div_frac_get()
37 divider_ux1 -= mul; in div_frac_get()
H A Dclk-divider.c40 int div, mul; in clk_frac_div_recalc_rate() local
51 mul = get_mul(divider); in clk_frac_div_recalc_rate()
52 div += mul; in clk_frac_div_recalc_rate()
54 rate *= mul; in clk_frac_div_recalc_rate()
65 int div, mul; in clk_frac_div_determine_rate() local
81 mul = get_mul(divider); in clk_frac_div_determine_rate()
83 req->rate = DIV_ROUND_UP(output_rate * mul, div + mul); in clk_frac_div_determine_rate()
H A Dclk-periph-fixed.c57 rate = (unsigned long long)parent_rate * fixed->mul; in tegra_clk_periph_fixed_recalc_rate()
74 unsigned int mul, in tegra_clk_register_periph_fixed() argument
99 fixed->mul = mul; in tegra_clk_register_periph_fixed()
/linux/drivers/clk/at91/
H A Dclk-pll.c40 u16 mul; member
69 u16 mul; in clk_pll_prepare() local
73 mul = PLL_MUL(pllr, layout); in clk_pll_prepare()
77 (div == pll->div && mul == pll->mul)) in clk_pll_prepare()
90 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
118 if (!pll->div || !pll->mul) in clk_pll_recalc_rate()
121 return (parent_rate / pll->div) * (pll->mul + 1); in clk_pll_recalc_rate()
126 u32 *div, u32 *mul, in clk_pll_get_best_div_mul() argument
226 if (mul) in clk_pll_get_best_div_mul()
227 *mul = bestmul - 1; in clk_pll_get_best_div_mul()
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/linux/include/vdso/
H A Dmath64.h27 static __always_inline u64 mul_u64_u32_add_u64_shr(u64 a, u32 mul, u64 b, unsigned int shift) in mul_u64_u32_add_u64_shr() argument
29 return (u64)((((unsigned __int128)a * mul) + b) >> shift); in mul_u64_u32_add_u64_shr()
43 static __always_inline u64 mul_u64_u32_add_u64_shr(u64 a, u32 mul, u64 b, unsigned int shift) in mul_u64_u32_add_u64_shr() argument
49 ovf = __builtin_add_overflow(mul_u32_u32(al, mul), b, &ret); in mul_u64_u32_add_u64_shr()
54 ret += mul_u32_u32(ah, mul) << (32 - shift); in mul_u64_u32_add_u64_shr()
/linux/drivers/net/wireless/ath/ath9k/
H A Dcommon.h39 #define ATH_EP_MUL(x, mul) ((x) * (mul)) argument
47 #define ATH_EP_RND(x, mul) \ argument
48 (((x) + ((mul)/2)) / (mul))
/linux/drivers/gpu/drm/i915/display/
H A Dintel_fixed.h75 static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul) in mul_round_up_u32_fixed16() argument
79 tmp = mul_u32_u32(val, mul.val); in mul_round_up_u32_fixed16()
87 uint_fixed_16_16_t mul) in mul_fixed16()
91 tmp = mul_u32_u32(val.val, mul.val); in mul_fixed16()
118 static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t mul) in mul_u32_fixed16() argument
122 tmp = mul_u32_u32(val, mul.val); in mul_u32_fixed16()
/linux/include/linux/
H A Dmath64.h175 static __always_inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument
177 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u32_shr()
182 static __always_inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) in mul_u64_u64_shr() argument
184 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u64_shr()
191 static __always_inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument
196 ret = mul_u32_u32(al, mul) >> shift; in mul_u64_u32_shr()
198 ret += mul_u32_u32(ah, mul) << (32 - shift); in mul_u64_u32_shr()
268 static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 divisor) in mul_u64_u32_div() argument
282 rl.ll = mul_u32_u32(u.l.low, mul); in mul_u64_u32_div()
283 rh.ll = mul_u32_u32(u.l.high, mul) + rl.l.high; in mul_u64_u32_div()
/linux/arch/m68k/fpsp040/
H A Dbinstr.S16 | bit 63. The fraction is multiplied by 10 using a mul by 2
17 | shift and a mul by 8 shift. The bits shifted out of the
51 | d2: upper 32-bits of fraction for mul by 8
52 | d3: lower 32-bits of fraction for mul by 8
53 | d4: upper 32-bits of fraction for mul by 2
54 | d5: lower 32-bits of fraction for mul by 2
97 asll #1,%d5 |mul d5 by 2
98 roxll #1,%d4 |mul d4 by 2
100 addxw %d6,%d1 |add in extend from mul by 2
102 | A5. Add mul by 8 to mul by 2. D1 contains the digit formed.
H A Ddecbin.S62 | Clean up and return. Check if the final mul or div resulted
125 | 2. Calculate absolute value of exponent in d1 by mul and add.
153 mulul #TEN,%d1 |mul partial product by one digit place
463 bccs e_next |if zero, skip the mul
464 fmulx (%a1,%d3),%fp1 |mul by 10**(d3_bit_no)
483 beqs mul |if clear, go to multiply
487 mul: label
493 | If the final mul/div in decbin incurred an inex exception,
/linux/arch/x86/include/asm/
H A Ddiv64.h106 static inline u64 mul_u64_add_u64_div_u64(u64 rax, u64 mul, u64 add, u64 div) in mul_u64_add_u64_div_u64() argument
110 asm ("mulq %[mul]" : "+a" (rax), "=d" (rdx) : [mul] "rm" (mul)); in mul_u64_add_u64_div_u64()
122 static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 div) in mul_u64_u32_div() argument
124 return mul_u64_add_u64_div_u64(a, mul, 0, div); in mul_u64_u32_div()
/linux/drivers/pwm/
H A Dpwm-img.c93 unsigned long mul, output_clk_hz, input_clk_hz; in img_pwm_config() local
107 mul = DIV_ROUND_UP(input_clk_hz, output_clk_hz); in img_pwm_config()
108 if (mul <= max_timebase) { in img_pwm_config()
110 timebase = DIV_ROUND_UP(mul, 1); in img_pwm_config()
111 } else if (mul <= max_timebase * 8) { in img_pwm_config()
113 timebase = DIV_ROUND_UP(mul, 8); in img_pwm_config()
114 } else if (mul <= max_timebase * 64) { in img_pwm_config()
116 timebase = DIV_ROUND_UP(mul, 64); in img_pwm_config()
117 } else if (mul <= max_timebase * 512) { in img_pwm_config()
119 timebase = DIV_ROUND_UP(mul, 512); in img_pwm_config()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_afmt.c54 unsigned long div, mul; in amdgpu_afmt_calc_cts() local
70 mul = ((128*freq/1000) + (n-1))/n; in amdgpu_afmt_calc_cts()
72 n *= mul; in amdgpu_afmt_calc_cts()
73 cts *= mul; in amdgpu_afmt_calc_cts()
/linux/arch/arm/lib/
H A Dmuldi3.S28 mul xh, yl, xh
35 mul yh, xl, yh
36 mul xl, yl, xl
37 mul ip, yl, ip
/linux/arch/arm/boot/compressed/
H A Dll_char_wr.S66 mul r7, r2, r7
71 mul r7, r2, r7
85 mul r4, r2, ip
88 mul ip, r2, ip @ avoid r4
95 mul r4, r2, ip
98 mul ip, r2, ip @ avoid r4
/linux/drivers/gpu/drm/tegra/
H A Dhda.c14 unsigned int mul, div, bits, channels; in tegra_hda_parse_format() local
26 mul = (format & AC_FMT_MULT_MASK) >> AC_FMT_MULT_SHIFT; in tegra_hda_parse_format()
29 fmt->sample_rate *= (mul + 1) / (div + 1); in tegra_hda_parse_format()
H A Ddsi.c46 unsigned int mul; member
483 unsigned int hact, hsw, hbp, hfp, i, mul, div; in tegra_dsi_configure() local
494 mul = state->mul; in tegra_dsi_configure()
541 hact = mode->hdisplay * mul / div; in tegra_dsi_configure()
544 hsw = (mode->hsync_end - mode->hsync_start) * mul / div; in tegra_dsi_configure()
547 hbp = (mode->htotal - mode->hsync_end) * mul / div; in tegra_dsi_configure()
550 hfp = (mode->hsync_start - mode->hdisplay) * mul / div; in tegra_dsi_configure()
578 bytes = 1 + (mode->hdisplay / 2) * mul / div; in tegra_dsi_configure()
581 bytes = 1 + mode->hdisplay * mul / div; in tegra_dsi_configure()
601 delay = DIV_ROUND_UP(delay * mul, div * lanes); in tegra_dsi_configure()
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/linux/lib/crypto/mpi/
H A DMakefile23 mpi-mul.o \
26 mpih-mul.o \
/linux/arch/nios2/
H A DMakefile28 KBUILD_CFLAGS += $(if $(CONFIG_NIOS2_HW_MUL_SUPPORT),-mhw-mul,-mno-hw-mul)
/linux/drivers/media/radio/si4713/
H A Dsi4713.c926 s32 *bit, s32 *mask, u16 *property, int *mul, in si4713_choose_econtrol_action() argument
935 *mul = 1; in si4713_choose_econtrol_action()
939 *mul = 1; in si4713_choose_econtrol_action()
943 *mul = 1; in si4713_choose_econtrol_action()
947 *mul = 1; in si4713_choose_econtrol_action()
951 *mul = ATTACK_TIME_UNIT; in si4713_choose_econtrol_action()
955 *mul = 10; in si4713_choose_econtrol_action()
959 *mul = 10; in si4713_choose_econtrol_action()
963 *mul = 1; in si4713_choose_econtrol_action()
1110 int mul = 0; in si4713_s_ctrl() local
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