Home
last modified time | relevance | path

Searched refs:mtr (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/edac/
H A Dsb_edac.c214 #define RANK_DISABLE(mtr) GET_BITFIELD(mtr, 16, 19) argument
215 #define IS_DIMM_PRESENT(mtr) GET_BITFIELD(mtr, 14, 14) argument
216 #define RANK_CNT_BITS(mtr) GET_BITFIELD(mtr, 12, 13) argument
217 #define RANK_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 2, 4) argument
218 #define COL_WIDTH_BITS(mtr) GET_BITFIELD(mtr, 0, 1) argument
332 enum dev_type (*get_width)(struct sbridge_pvt *pvt, u32 mtr);
698 static inline int numrank(enum type type, u32 mtr) in numrank() argument
700 int ranks = (1 << RANK_CNT_BITS(mtr)); in numrank()
708 ranks, max, (unsigned int)RANK_CNT_BITS(mtr), mtr); in numrank()
715 static inline int numrow(u32 mtr) in numrow() argument
[all …]
/linux/arch/alpha/include/asm/
H A Dcore_tsunami.h36 tsunami_64 mtr; member
H A Dcore_titan.h37 titan_64 mtr; member
/linux/arch/alpha/kernel/
H A Dcore_tsunami.c397 printk("%s: CSR_MTR 0x%lx\n", __func__, TSUNAMI_cchip.mtr.csr); in tsunami_init_arch()
H A Dcore_titan.c373 printk("%s: CSR_MTR 0x%lx\n", __func__, TITAN_cchip->mtr.csr); in titan_init_arch()
/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dhwmon.c60 MLX5_SET(mtmp_reg, mtmp_in, mtr, 1); in mlx5_hwmon_reset_max_temp()