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Searched refs:mtk_mmsys_update_bits (Results 1 – 1 of 1) sorted by relevance

/linux/drivers/soc/mediatek/
H A Dmtk-mmsys.c163 static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, u32 val, in mtk_mmsys_update_bits() function
193 mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask, in mtk_mmsys_ddp_connect()
197 mtk_mmsys_update_bits(mmsys, MT8188_VDO1_MIXER_VSYNC_LEN, GENMASK(31, 0), in mtk_mmsys_ddp_connect()
212 mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask, 0, NULL); in mtk_mmsys_ddp_disconnect()
219 mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8195_VDO1_MERGE0_ASYNC_CFG_WD + 0x10 * idx, in mtk_mmsys_merge_async_config()
227 mtk_mmsys_update_bits(dev_get_drvdata(dev), MT8195_VDO1_HDRBE_ASYNC_CFG_WD, ~0, in mtk_mmsys_hdr_config()
237 mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_ALPHA + (idx - 1) * 4, ~0, in mtk_mmsys_mixer_in_config()
239 mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(15 + idx), 0, cmdq_pkt); in mtk_mmsys_mixer_in_config()
240 mtk_mmsys_update_bits(mmsys, MT8195_VDO1_HDR_TOP_CFG, BIT(19 + idx), in mtk_mmsys_mixer_in_config()
242 mtk_mmsys_update_bits(mmsys, MT8195_VDO1_MIXER_IN1_PAD + (idx - 1) * 4, in mtk_mmsys_mixer_in_config()
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