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Searched refs:mtaspect (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/radeon/
H A Dradeon_object.c611 unsigned bankw, bankh, mtaspect, tilesplit, stilesplit; in radeon_bo_set_tiling_flags() local
615 …mtaspect = (tiling_flags >> RADEON_TILING_EG_MACRO_TILE_ASPECT_SHIFT) & RADEON_TILING_EG_MACRO_TIL… in radeon_bo_set_tiling_flags()
638 switch (mtaspect) { in radeon_bo_set_tiling_flags()
H A Devergreen_cs.c1184 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1187 &bankw, &bankh, &mtaspect, in evergreen_cs_handle_reg()
1193 DB_MACRO_TILE_ASPECT(mtaspect); in evergreen_cs_handle_reg()
1448 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1451 &bankw, &bankh, &mtaspect, in evergreen_cs_handle_reg()
1457 CB_MACRO_TILE_ASPECT(mtaspect); in evergreen_cs_handle_reg()
1476 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_cs_handle_reg() local
1479 &bankw, &bankh, &mtaspect, in evergreen_cs_handle_reg()
1485 CB_MACRO_TILE_ASPECT(mtaspect); in evergreen_cs_handle_reg()
2365 unsigned bankw, bankh, mtaspect, tile_split; in evergreen_packet3_check() local
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c186 unsigned int bankw, bankh, mtaspect, tile_split, num_banks; in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags() local
190 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
202 tiling_info->gfx8.tile_aspect = mtaspect; in amdgpu_dm_plane_fill_gfx8_tiling_info_from_flags()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v8_0.c1915 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v8_0_crtc_do_set_base() local
1919 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v8_0_crtc_do_set_base()
1928 fb_format |= (mtaspect << GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT); in dce_v8_0_crtc_do_set_base()
H A Ddce_v6_0.c2003 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v6_0_crtc_do_set_base() local
2007 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v6_0_crtc_do_set_base()
2016 fb_format |= (mtaspect << GRPH_CONTROL__GRPH_MACRO_TILE_ASPECT__SHIFT); in dce_v6_0_crtc_do_set_base()
H A Ddce_v10_0.c1976 unsigned bankw, bankh, mtaspect, tile_split, num_banks; in dce_v10_0_crtc_do_set_base() local
1980 mtaspect = AMDGPU_TILING_GET(tiling_flags, MACRO_TILE_ASPECT); in dce_v10_0_crtc_do_set_base()
1992 mtaspect); in dce_v10_0_crtc_do_set_base()