| /linux/arch/x86/kvm/vmx/ |
| H A D | nested.h | 52 int vmx_get_vmx_msr(struct nested_vmx_msrs *msrs, u32 msr_index, u64 *pdata); 125 return vmx_misc_cr3_count(to_vmx(vcpu)->nested.msrs.misc_low); in nested_cpu_vmx_misc_cr3_count() 135 return to_vmx(vcpu)->nested.msrs.misc_low & in nested_cpu_has_vmwrite_any_field() 141 return to_vmx(vcpu)->nested.msrs.misc_low & VMX_MISC_ZERO_LEN_INS; in nested_cpu_has_zero_length_injection() 146 return to_vmx(vcpu)->nested.msrs.procbased_ctls_high & in nested_cpu_supports_monitor_trap_flag() 152 return to_vmx(vcpu)->nested.msrs.secondary_ctls_high & in nested_cpu_has_vmx_shadow_vmcs() 283 u64 fixed0 = to_vmx(vcpu)->nested.msrs.cr0_fixed0; in nested_guest_cr0_valid() 284 u64 fixed1 = to_vmx(vcpu)->nested.msrs.cr0_fixed1; in nested_guest_cr0_valid() 287 if (to_vmx(vcpu)->nested.msrs.secondary_ctls_high & in nested_guest_cr0_valid() 297 u64 fixed0 = to_vmx(vcpu)->nested.msrs.cr0_fixed0; in nested_host_cr0_valid() [all …]
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| H A D | nested.c | 471 bool execonly = vmx->nested.msrs.ept_caps & VMX_EPT_EXECUTE_ONLY_BIT; in nested_ept_new_eptp() 472 int ept_lpage_level = ept_caps_to_lpage_level(vmx->nested.msrs.ept_caps); in nested_ept_new_eptp() 895 u64 vmx_misc = vmx_control_msr(vmx->nested.msrs.misc_low, in nested_vmx_max_atomic_switch_msrs() 896 vmx->nested.msrs.misc_high); in nested_vmx_max_atomic_switch_msrs() 1327 vmx->nested.msrs.basic = data; in vmx_restore_vmx_basic() 1331 static void vmx_get_control_msr(struct nested_vmx_msrs *msrs, u32 msr_index, in vmx_get_control_msr() argument 1336 *low = &msrs->pinbased_ctls_low; in vmx_get_control_msr() 1337 *high = &msrs->pinbased_ctls_high; in vmx_get_control_msr() 1340 *low = &msrs->procbased_ctls_low; in vmx_get_control_msr() 1341 *high = &msrs->procbased_ctls_high; in vmx_get_control_msr() [all …]
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| /linux/tools/testing/selftests/kvm/x86/ |
| H A D | msrs_test.c | 72 static struct kvm_msr msrs[128]; variable 194 const struct kvm_msr *msr = &msrs[READ_ONCE(idx)]; in guest_main() 253 bool has_reg = vcpu_cpuid_has(vcpu, msrs[idx].feature); in host_test_kvm_reg() 254 u64 reset_val = msrs[idx].reset_val; in host_test_kvm_reg() 255 u64 write_val = msrs[idx].write_val; in host_test_kvm_reg() 256 u64 rsvd_val = msrs[idx].rsvd_val; in host_test_kvm_reg() 257 u32 reg = msrs[idx].index; in host_test_kvm_reg() 290 u64 reset_val = msrs[idx].reset_val; in host_test_msr() 291 u32 msr = msrs[idx].index; in host_test_msr() 294 if (!kvm_cpu_has(msrs[id in host_test_msr() [all...] |
| /linux/tools/testing/selftests/kvm/include/x86/ |
| H A D | processor.h | 427 struct kvm_msrs msrs; member 904 struct kvm_msrs *msrs) in vcpu_msrs_get() argument 906 int r = __vcpu_ioctl(vcpu, KVM_GET_MSRS, msrs); in vcpu_msrs_get() 908 TEST_ASSERT(r == msrs->nmsrs, in vcpu_msrs_get() 910 r, r < 0 || r >= msrs->nmsrs ? -1 : msrs->entries[r].index); in vcpu_msrs_get() 912 static inline void vcpu_msrs_set(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs) in vcpu_msrs_set() argument 914 int r = __vcpu_ioctl(vcpu, KVM_SET_MSRS, msrs); in vcpu_msrs_set() 916 TEST_ASSERT(r == msrs->nmsrs, in vcpu_msrs_set() 918 r, r < 0 || r >= msrs->nmsrs ? -1 : msrs->entries[r].index); in vcpu_msrs_set()
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| /linux/Documentation/virt/kvm/x86/ |
| H A D | cpuid.rst | 44 KVM_FEATURE_CLOCKSOURCE 0 kvmclock available at msrs 52 KVM_FEATURE_CLOCKSOURCE2 3 kvmclock available at msrs
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| /linux/arch/x86/kernel/cpu/mce/ |
| H A D | amd.c | 643 u32 msrs[NR_BLOCKS]; in disable_err_thresholding() local 646 msrs[0] = 0x00000413; /* MC4_MISC0 */ in disable_err_thresholding() 647 msrs[1] = 0xc0000408; /* MC4_MISC1 */ in disable_err_thresholding() 655 msrs[0] = MSR_AMD64_SMCA_MCx_MISC(bank); in disable_err_thresholding() 670 msr_clear_bit(msrs[i], 62); in disable_err_thresholding()
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | hamoa.dtsi | 6887 qcom,cmb-msrs-num = <32>; 6944 qcom,cmb-msrs-num = <32>; 7082 qcom,cmb-msrs-num = <32>; 7101 qcom,dsb-msrs-num = <32>; 7120 qcom,cmb-msrs-num = <32>; 7139 qcom,dsb-msrs-num = <32>; 7190 qcom,dsb-msrs-num = <32>; 7210 qcom,dsb-msrs-num = <32>; 7230 qcom,cmb-msrs-num = <32>; 7464 qcom,cmb-msrs-num = <32>; [all …]
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| H A D | monaco.dtsi | 3050 qcom,cmb-msrs-num = <32>; 3312 qcom,cmb-msrs-num = <32>; 3331 qcom,cmb-msrs-num = <32>; 3333 qcom,dsb-msrs-num = <32>; 3352 qcom,dsb-msrs-num = <32>; 3445 qcom,dsb-msrs-num = <32>; 3488 qcom,dsb-msrs-num = <32>; 3560 qcom,dsb-msrs-num = <32>; 3812 qcom,cmb-msrs-num = <32>; 3831 qcom,cmb-msrs-num = <32>; [all …]
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| /linux/tools/testing/selftests/kvm/lib/x86/ |
| H A D | processor.c | 1243 state = malloc(sizeof(*state) + msr_list->nmsrs * sizeof(state->msrs.entries[0])); in vcpu_save_state() 1267 state->msrs.nmsrs = msr_list->nmsrs; in vcpu_save_state() 1269 state->msrs.entries[i].index = msr_list->indices[i]; in vcpu_save_state() 1270 vcpu_msrs_get(vcpu, &state->msrs); in vcpu_save_state() 1280 vcpu_msrs_set(vcpu, &state->msrs); in vcpu_load_state()
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| /linux/arch/x86/kvm/ |
| H A D | x86.c | 599 struct kvm_user_return_msrs *msrs in kvm_on_user_return() local 603 msrs->registered = false; in kvm_on_user_return() 607 values = &msrs->values[slot]; in kvm_on_user_return() 656 struct kvm_user_return_msrs *msrs = this_cpu_ptr(&user_return_msrs); in kvm_user_return_msr_cpu_online() local 662 msrs->values[i].host = value; in kvm_user_return_msr_cpu_online() 663 msrs->values[i].curr = value; in kvm_user_return_msr_cpu_online() 667 static void kvm_user_return_register_notifier(struct kvm_user_return_msrs *msrs) in kvm_user_return_register_notifier() argument 669 if (!msrs->registered) { in kvm_user_return_register_notifier() 670 msrs->urn.on_user_return = kvm_on_user_return; in kvm_user_return_register_notifier() 671 user_return_notifier_register(&msrs->urn); in kvm_user_return_register_notifier() [all …]
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| /linux/Documentation/virt/kvm/ |
| H A D | api.rst | 238 __u32 nmsrs; /* number of msrs in entries */ 243 kvm adjusts nmsrs to reflect the actual number of msrs and fills in the 246 KVM_GET_MSR_INDEX_LIST returns the guest msrs that are supported. The list 650 :Returns: number of msrs successfully returned; 666 __u32 nmsrs; /* number of msrs in entries */ 690 :Returns: number of msrs successfully set (see below), -1 on error 4222 __u32 nmsrs; /* number of msrs in bitmap */
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