Searched refs:msr_base (Results 1 – 3 of 3) sorted by relevance
92 static void run_and_measure_loop(u32 msr_base) in run_and_measure_loop() argument 94 const u64 branches_retired = rdmsr(msr_base + 0); in run_and_measure_loop() 95 const u64 insn_retired = rdmsr(msr_base + 1); in run_and_measure_loop() 99 pmc_results.branches_retired = rdmsr(msr_base + 0) - branches_retired; in run_and_measure_loop() 100 pmc_results.instructions_retired = rdmsr(msr_base + 1) - insn_retired; in run_and_measure_loop() 418 static void masked_events_guest_test(u32 msr_base) in masked_events_guest_test() argument 424 const u64 loads = rdmsr(msr_base + 0); in masked_events_guest_test() 425 const u64 stores = rdmsr(msr_base + 1); in masked_events_guest_test() 426 const u64 loads_stores = rdmsr(msr_base + 2); in masked_events_guest_test() 435 pmc_results.loads = rdmsr(msr_base in masked_events_guest_test() [all...]
53 u32 msr_base; member235 hwc->config_base = pmu->msr_base + (2 * hwc->idx); in amd_uncore_add()236 hwc->event_base = pmu->msr_base + 1 + (2 * hwc->idx); in amd_uncore_add()774 pmu->msr_base = MSR_F15H_NB_PERF_CTL; in amd_uncore_df_ctx_init()908 pmu->msr_base = MSR_F16H_L2I_PERF_CTL; in amd_uncore_l3_ctx_init()1082 pmu->msr_base = MSR_F19H_UMC_PERF_CTL + i * pmu->num_counters * 2; in amd_uncore_umc_ctx_init()
138 unsigned int msr_base; member