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Searched refs:mpidr (Results 1 – 25 of 27) sorted by relevance

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/linux/arch/arm/mach-milbeaut/
H A Dplatsmp.c25 unsigned int mpidr, cpu, cluster; in m10v_boot_secondary() local
30 mpidr = cpu_logical_map(l_cpu); in m10v_boot_secondary()
31 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_boot_secondary()
32 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_boot_secondary()
48 unsigned int mpidr, cpu, cluster; in m10v_smp_init() local
59 mpidr = read_cpuid_mpidr(); in m10v_smp_init()
60 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_smp_init()
61 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_smp_init()
78 unsigned int mpidr, cpu; in m10v_cpu_kill() local
80 mpidr = cpu_logical_map(l_cpu); in m10v_cpu_kill()
[all …]
/linux/arch/arm/kernel/
H A Dtopology.c188 unsigned int mpidr; in store_cpu_topology() local
193 mpidr = read_cpuid_mpidr(); in store_cpu_topology()
196 if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { in store_cpu_topology()
202 if (mpidr & MPIDR_MT_BITMASK) { in store_cpu_topology()
204 cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology()
205 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology()
206 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2); in store_cpu_topology()
210 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology()
211 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology()
229 cpu_topology[cpuid].package_id, mpidr); in store_cpu_topology()
H A Dsleep.S38 .macro compute_mpidr_hash dst, rs0, rs1, rs2, mpidr, mask
39 and \mpidr, \mpidr, \mask @ mask out MPIDR bits
40 and \dst, \mpidr, #0xff @ mask=aff0
43 and \mask, \mpidr, #0xff00 @ mask = aff1
47 and \mask, \mpidr, #0xff0000 @ mask = aff2
85 ldmia r0, {r1, r6-r8} @ r1 = mpidr mask (r6,r7,r8) = l[0,1,2] shifts
H A Dsetup.c599 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; in smp_setup_processor_id() local
600 u32 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in smp_setup_processor_id()
613 pr_info("Booting Linux on physical CPU 0x%x\n", mpidr); in smp_setup_processor_id()
/linux/arch/arm/common/
H A Dmcpm_platsmp.c22 unsigned int mpidr; in cpu_to_pcpu() local
24 mpidr = cpu_logical_map(cpu); in cpu_to_pcpu()
25 *pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in cpu_to_pcpu()
26 *pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in cpu_to_pcpu()
73 unsigned int mpidr, pcpu, pcluster; in mcpm_cpu_die() local
74 mpidr = read_cpuid_mpidr(); in mcpm_cpu_die()
75 pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_die()
76 pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_die()
H A Dmcpm_entry.c241 unsigned int mpidr, cpu, cluster; in mcpm_cpu_power_down() local
245 mpidr = read_cpuid_mpidr(); in mcpm_cpu_power_down()
246 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_power_down()
247 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_power_down()
330 unsigned int mpidr = read_cpuid_mpidr(); in mcpm_cpu_suspend() local
331 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_suspend()
332 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_suspend()
342 unsigned int mpidr, cpu, cluster; in mcpm_cpu_powered_up() local
349 mpidr = read_cpuid_mpidr(); in mcpm_cpu_powered_up()
350 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_powered_up()
[all …]
/linux/arch/arm/mach-hisi/
H A Dplatmcpm.c100 unsigned int mpidr, cpu, cluster; in hip04_boot_secondary() local
104 mpidr = cpu_logical_map(l_cpu); in hip04_boot_secondary()
105 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_boot_secondary()
106 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hip04_boot_secondary()
155 unsigned int mpidr, cpu, cluster; in hip04_cpu_die() local
158 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_die()
159 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_cpu_die()
160 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hip04_cpu_die()
193 unsigned int mpidr, cpu, cluster; in hip04_cpu_kill() local
196 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_kill()
[all …]
/linux/drivers/bus/
H A Darm-cci.c117 u64 mpidr; member
132 static inline void init_cpu_port(struct cpu_port *port, u32 index, u64 mpidr) in init_cpu_port() argument
135 port->mpidr = mpidr; in init_cpu_port()
143 static inline bool cpu_port_match(struct cpu_port *port, u64 mpidr) in cpu_port_match() argument
145 return port->mpidr == (mpidr & MPIDR_HWID_BITMASK); in cpu_port_match()
265 int notrace cci_disable_port_by_cpu(u64 mpidr) in cci_disable_port_by_cpu() argument
271 if (is_valid && cpu_port_match(&cpu_port[cpu], mpidr)) { in cci_disable_port_by_cpu()
366 [offsetof_cpu_port_mpidr_lsb] "i" (offsetof(struct cpu_port, mpidr)), in cci_enable_port_for_self()
368 [offsetof_cpu_port_mpidr_lsb] "i" (offsetof(struct cpu_port, mpidr)+4), in cci_enable_port_for_self()
/linux/arch/arm64/kernel/
H A Dsleep.S39 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
40 and \mpidr, \mpidr, \mask // mask out MPIDR bits
41 and \dst, \mpidr, #0xff // mask=aff0
43 and \mask, \mpidr, #0xff00 // mask = aff1
46 and \mask, \mpidr, #0xff0000 // mask = aff2
49 and \mask, \mpidr, #0xff00000000 // mask = aff3
H A Dsmp.c199 u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; in secondary_start_kernel() local
255 cpu, (unsigned long)mpidr, in secondary_start_kernel()
/linux/arch/arm/mach-sunxi/
H A Dmc_smp.c393 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_boot_secondary() local
395 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_boot_secondary()
396 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in sunxi_mc_smp_boot_secondary()
397 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in sunxi_mc_smp_boot_secondary()
445 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_cpu_die() local
448 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_cpu_die()
449 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in sunxi_mc_smp_cpu_die()
450 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in sunxi_mc_smp_cpu_die()
535 unsigned int mpidr, cpu, cluster; in sunxi_mc_smp_cpu_kill() local
540 mpidr = cpu_logical_map(l_cpu); in sunxi_mc_smp_cpu_kill()
[all …]
/linux/arch/arm/mach-exynos/
H A Dplatsmp.c51 u32 mpidr = cpu_logical_map(cpu); in platform_do_lowpower() local
52 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in platform_do_lowpower()
320 u32 mpidr = cpu_logical_map(cpu); in exynos_boot_secondary() local
321 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos_boot_secondary()
425 u32 mpidr = cpu_logical_map(cpu); in exynos_cpu_die() local
426 u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos_cpu_die()
H A Dsuspend.c267 unsigned int mpidr = read_cpuid_mpidr(); in exynos5420_cpu_suspend() local
268 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in exynos5420_cpu_suspend()
269 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in exynos5420_cpu_suspend()
453 unsigned int mpidr, cluster; in exynos5420_prepare_pm_resume() local
455 mpidr = read_cpuid_mpidr(); in exynos5420_prepare_pm_resume()
456 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in exynos5420_prepare_pm_resume()
/linux/arch/arm/mach-versatile/
H A Dtc2_pm.c202 unsigned int mpidr, cpu, cluster; in tc2_pm_init() local
242 mpidr = read_cpuid_mpidr(); in tc2_pm_init()
243 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in tc2_pm_init()
244 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in tc2_pm_init()
/linux/arch/arm64/include/asm/
H A Dsmp_plat.h35 static inline int get_logical_index(u64 mpidr) in get_logical_index() argument
39 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
/linux/arch/arm/include/asm/
H A DbL_switcher.h55 int bL_switcher_get_logical_index(u32 mpidr);
71 static inline int bL_switcher_get_logical_index(u32 mpidr) { return -EUNATCH; } in bL_switcher_get_logical_index() argument
H A Dsmp_plat.h80 static inline int get_logical_index(u32 mpidr) in get_logical_index() argument
84 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
H A Dcputype.h62 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ argument
63 ((mpidr >> (MPIDR_LEVEL_BITS * level)) & MPIDR_LEVEL_MASK)
/linux/include/linux/
H A Darm-cci.h26 extern int cci_disable_port_by_cpu(u64 mpidr);
34 static inline int cci_disable_port_by_cpu(u64 mpidr) { return -ENODEV; } in cci_disable_port_by_cpu() argument
/linux/Documentation/virt/kvm/devices/
H A Darm-vgic-v3.rst93 values: | mpidr | offset |
103 specified by the mpidr.
114 The mpidr field is used to specify which
115 redistributor is accessed. The mpidr is ignored for the distributor.
117 The mpidr encoding is based on the affinity information in the
124 regardless of the mpidr used to access the register.
199 values: | mpidr | RES | instr |
201 The mpidr field encodes the CPU ID based on the affinity information in the
218 CPU specified by the mpidr field.
281 -EINVAL Invalid mpidr or register value supplied
[all …]
/linux/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v3.c232 ret = extract_bytes(READ_ONCE(irq->mpidr), addr & 7, len); in vgic_mmio_read_irouter()
258 irq->mpidr = val & GENMASK(23, 0); in vgic_mmio_write_irouter()
259 irq->target_vcpu = kvm_mpidr_to_vcpu(vcpu->kvm, irq->mpidr); in vgic_mmio_write_irouter()
349 unsigned long mpidr = kvm_vcpu_get_mpidr_aff(vcpu); in vgic_mmio_read_v3r_typer() local
353 value = (u64)(mpidr & GENMASK(23, 0)) << 32; in vgic_mmio_read_v3r_typer()
1106 u64 mpidr; in vgic_v3_dispatch_sgi() local
1126 mpidr = SGI_AFFINITY_LEVEL(reg, 3); in vgic_v3_dispatch_sgi()
1127 mpidr |= SGI_AFFINITY_LEVEL(reg, 2); in vgic_v3_dispatch_sgi()
1128 mpidr |= SGI_AFFINITY_LEVEL(reg, 1); in vgic_v3_dispatch_sgi()
1132 c_vcpu = kvm_mpidr_to_vcpu(kvm, mpidr | aff0); in vgic_v3_dispatch_sgi()
/linux/drivers/perf/hisilicon/
H A Dhisi_uncore_pmu.c452 u64 mpidr = read_cpuid_mpidr(); in hisi_read_sccl_and_ccl_id() local
453 int aff3 = MPIDR_AFFINITY_LEVEL(mpidr, 3); in hisi_read_sccl_and_ccl_id()
454 int aff2 = MPIDR_AFFINITY_LEVEL(mpidr, 2); in hisi_read_sccl_and_ccl_id()
455 int aff1 = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hisi_read_sccl_and_ccl_id()
456 bool mt = mpidr & MPIDR_MT_BITMASK; in hisi_read_sccl_and_ccl_id()
/linux/drivers/perf/
H A Dqcom_l2_pmu.c737 u64 mpidr; in l2_cache_associate_cpu_with_cluster() local
746 mpidr = read_cpuid_mpidr(); in l2_cache_associate_cpu_with_cluster()
747 if (mpidr & MPIDR_MT_BITMASK) in l2_cache_associate_cpu_with_cluster()
748 cpu_cluster_id = MPIDR_AFFINITY_LEVEL(mpidr, 2); in l2_cache_associate_cpu_with_cluster()
750 cpu_cluster_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in l2_cache_associate_cpu_with_cluster()
/linux/tools/arch/arm64/include/asm/
H A Dcputype.h21 #define MPIDR_AFFINITY_LEVEL(mpidr, level) \ argument
22 ((mpidr >> MPIDR_LEVEL_SHIFT(level)) & MPIDR_LEVEL_MASK)
/linux/arch/arm/mach-shmobile/
H A Dheadsmp.S103 add r5, r5, r2 @ array of per-cpu mpidr values

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