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Searched refs:mode_set (Results 1 – 25 of 37) sorted by relevance

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/linux/drivers/platform/x86/amd/pmf/
H A Dauto-mode.c36 pr_debug("pfloor_perf: %u mW\n", data->mode_set[AUTO_PERFORMANCE].power_floor); in amd_pmf_dump_auto_mode_defaults()
37 pr_debug("pfloor_balanced: %u mW\n", data->mode_set[AUTO_BALANCE].power_floor); in amd_pmf_dump_auto_mode_defaults()
38 pr_debug("pfloor_quiet: %u mW\n", data->mode_set[AUTO_QUIET].power_floor); in amd_pmf_dump_auto_mode_defaults()
51 its_mode = &data->mode_set[AUTO_PERFORMANCE_ON_LAP]; in amd_pmf_dump_auto_mode_defaults()
58 its_mode = &data->mode_set[AUTO_PERFORMANCE]; in amd_pmf_dump_auto_mode_defaults()
63 its_mode = &data->mode_set[AUTO_BALANCE]; in amd_pmf_dump_auto_mode_defaults()
68 its_mode = &data->mode_set[AUTO_QUIET]; in amd_pmf_dump_auto_mode_defaults()
74 its_mode = &data->mode_set[AUTO_PERFORMANCE_ON_LAP]; in amd_pmf_dump_auto_mode_defaults()
80 its_mode = &data->mode_set[AUTO_PERFORMANCE]; in amd_pmf_dump_auto_mode_defaults()
86 its_mode = &data->mode_set[AUTO_BALANCE]; in amd_pmf_dump_auto_mode_defaults()
[all …]
H A Dcnqf.c77 pc = &config_store.mode_set[src][idx].power_control; in amd_pmf_set_cnqf()
91 config_store.mode_set[src][idx].fan_control.manual, in amd_pmf_set_cnqf()
92 config_store.mode_set[src][idx].fan_control.fan_id); in amd_pmf_set_cnqf()
103 ts = &config_store.mode_set[src][CNQF_MODE_BALANCE]; in amd_pmf_update_power_threshold()
107 ts = &config_store.mode_set[src][CNQF_MODE_PERFORMANCE]; in amd_pmf_update_power_threshold()
111 ts = &config_store.mode_set[src][CNQF_MODE_BALANCE]; in amd_pmf_update_power_threshold()
115 ts = &config_store.mode_set[src][CNQF_MODE_PERFORMANCE]; in amd_pmf_update_power_threshold()
119 ts = &config_store.mode_set[src][CNQF_MODE_QUIET]; in amd_pmf_update_power_threshold()
123 ts = &config_store.mode_set[src][CNQF_MODE_TURBO]; in amd_pmf_update_power_threshold()
276 ms = &config_store.mode_set[idx][CNQF_MODE_QUIET]; in amd_pmf_update_mode_set()
[all …]
H A Dpmf.h777 struct auto_mode_mode_settings mode_set[AUTO_MODE_MAX]; member
879 struct cnqf_mode_settings mode_set[POWER_SOURCE_MAX][CNQF_MODE_MAX]; member
/linux/arch/arm/mach-rockchip/
H A Dpm.c89 u32 mode_set, mode_set1; in rk3288_slp_mode_set() local
117 mode_set = BIT(PMU_GLOBAL_INT_DISABLE) | BIT(PMU_L2FLUSH_EN) | in rk3288_slp_mode_set()
127 mode_set |= BIT(PMU_BUS_PD_EN) | BIT(PMU_PMU_USE_LF) | in rk3288_slp_mode_set()
132 mode_set |= BIT(PMU_OSC_24M_DIS); in rk3288_slp_mode_set()
158 mode_set |= BIT(PMU_CLK_CORE_SRC_GATE_EN); in rk3288_slp_mode_set()
170 regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON, mode_set); in rk3288_slp_mode_set()
/linux/drivers/gpu/drm/gma500/
H A Dpsb_intel_display.c429 .mode_set = psb_intel_crtc_mode_set,
516 gma_crtc->mode_set.crtc = &gma_crtc->base; in psb_intel_crtc_init()
521 gma_crtc->mode_set.connectors = (struct drm_connector **)(gma_crtc + 1); in psb_intel_crtc_init()
522 gma_crtc->mode_set.num_connectors = 0; in psb_intel_crtc_init()
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dtvnv04.c161 get_encoder_i2c_funcs(encoder)->mode_set(encoder, mode, adjusted_mode); in nv04_tv_mode_set()
197 .mode_set = nv04_tv_mode_set,
H A Ddfp.c476 get_encoder_i2c_funcs(slave_encoder)->mode_set(slave_encoder, in nv04_dfp_commit()
662 .mode_set = nv04_dfp_mode_set,
671 .mode_set = nv04_dfp_mode_set,
H A Ddac.c510 .mode_set = nv04_dac_mode_set,
519 .mode_set = nv04_dac_mode_set,
/linux/drivers/gpu/drm/nouveau/include/dispnv04/i2c/
H A Dencoder_i2c.h92 void (*mode_set)(struct drm_encoder *encoder, member
/linux/sound/soc/codecs/
H A Dsma1307.c1760 sma1307->set.mode_set[i] in sma1307_setting_loaded()
1764 if (!sma1307->set.mode_set[i]) { in sma1307_setting_loaded()
1766 devm_kfree(sma1307->dev, sma1307->set.mode_set[j]); in sma1307_setting_loaded()
1767 sma1307->set.mode_set[j] = NULL; in sma1307_setting_loaded()
1774 sma1307->set.mode_set[i][2 * j] in sma1307_setting_loaded()
1776 sma1307->set.mode_set[i][2 * j + 1] in sma1307_setting_loaded()
1834 sma1307->set.mode_set[mode][2 * i], in sma1307_set_binary()
1835 sma1307->set.mode_set[mode][2 * i + in sma1307_set_binary()
/linux/drivers/gpu/drm/omapdrm/
H A Domap_encoder.c115 .mode_set = omap_encoder_mode_set,
/linux/drivers/iio/adc/
H A Dti-ads131m02.c787 u16 mode_clear, mode_set; in ads131m_hw_init() local
828 mode_set = ADS131M_MODE_RX_CRC_EN; in ads131m_hw_init()
830 ret = ads131m_rmw_reg(priv, ADS131M_REG_MODE, mode_clear, mode_set); in ads131m_hw_init()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_audio.h64 void (*mode_set)(struct drm_encoder *encoder, member
H A Dradeon_legacy_encoders.c277 .mode_set = radeon_legacy_lvds_mode_set,
713 .mode_set = radeon_legacy_primary_dac_mode_set,
878 .mode_set = radeon_legacy_tmds_int_mode_set,
1021 .mode_set = radeon_legacy_tmds_ext_mode_set,
1679 .mode_set = radeon_legacy_tv_dac_mode_set,
/linux/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_dsi_encoder.c131 .mode_set = mdp4_dsi_encoder_mode_set,
H A Dmdp4_dtv_encoder.c151 .mode_set = mdp4_dtv_encoder_mode_set,
/linux/drivers/gpu/drm/i915/display/
H A Ddvo_sil164.c286 .mode_set = sil164_mode_set,
H A Ddvo_tfp410.c316 .mode_set = tfp410_mode_set,
H A Ddvo_ch7xxx.c382 .mode_set = ch7xxx_mode_set,
H A Ddvo_ch7017.c412 .mode_set = ch7017_mode_set,
H A Ddvo_ivch.c501 .mode_set = ivch_mode_set,
H A Ddvo_ns2501.c706 .mode_set = ns2501_mode_set,
/linux/drivers/gpu/drm/imx/lcdc/
H A Dimx-lcdc.c139 bool mode_set) in imx_lcdc_update_hw_registers() argument
153 if (!mode_set) in imx_lcdc_update_hw_registers()
/linux/drivers/gpu/drm/nouveau/dispnv04/i2c/
H A Dsil164_drv.c344 .mode_set = sil164_encoder_mode_set,
H A Dch7006_drv.c381 .mode_set = ch7006_encoder_mode_set,

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