Searched refs:mode_pclk_khz (Results 1 – 4 of 4) sorted by relevance
248 int mode_pclk_khz = mode->clock; in msm_edp_bridge_mode_valid() local252 if (!dp || !mode_pclk_khz || !dp->connector) { in msm_edp_bridge_mode_valid()258 mode_pclk_khz /= 2; in msm_edp_bridge_mode_valid()260 if (mode_pclk_khz > DP_MAX_PIXEL_CLK_KHZ) in msm_edp_bridge_mode_valid()
215 u32 mode_edid_bpp, u32 mode_pclk_khz) in msm_dp_panel_get_supported_bpp() argument227 if (mode_pclk_khz * bpp <= data_rate_khz) in msm_dp_panel_get_supported_bpp()278 u32 mode_edid_bpp, u32 mode_pclk_khz) in msm_dp_panel_get_mode_bpp() argument283 if (!msm_dp_panel || !mode_edid_bpp || !mode_pclk_khz) { in msm_dp_panel_get_mode_bpp()295 mode_pclk_khz); in msm_dp_panel_get_mode_bpp()
54 u32 mode_pclk_khz);
758 int mode_pclk_khz = mode->clock; in msm_dp_display_mode_valid() local762 if (!dp || !mode_pclk_khz || !dp->connector) { in msm_dp_display_mode_valid()779 link_pclk_khz = is_yuv_420 ? mode_pclk_khz / 2 : mode_pclk_khz; in msm_dp_display_mode_valid()782 mode_pclk_khz /= 2; in msm_dp_display_mode_valid()784 if (mode_pclk_khz > DP_MAX_PIXEL_CLK_KHZ) in msm_dp_display_mode_valid()