Home
last modified time | relevance | path

Searched refs:mmVM_INVALIDATE_REQUEST (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgmc_v7_0.c449 WREG32(mmVM_INVALIDATE_REQUEST, mask); in gmc_v7_0_flush_gpu_tlb_pasid()
474 WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v7_0_flush_gpu_tlb()
489 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v7_0_emit_flush_gpu_tlb()
H A Dgmc_v6_0.c357 WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v6_0_flush_gpu_tlb()
373 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v6_0_emit_flush_gpu_tlb()
H A Dgmc_v8_0.c640 WREG32(mmVM_INVALIDATE_REQUEST, mask); in gmc_v8_0_flush_gpu_tlb_pasid()
665 WREG32(mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v8_0_flush_gpu_tlb()
680 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v8_0_emit_flush_gpu_tlb()
H A Dsdma_v2_4.c795 amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2); in sdma_v2_4_ring_emit_vm_flush()
H A Dcik_sdma.c859 amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2); in cik_sdma_ring_emit_vm_flush()
H A Dsdma_v3_0.c1068 amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2); in sdma_v3_0_ring_emit_vm_flush()
H A Duvd_v6_0.c1081 amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2); in uvd_v6_0_ring_emit_vm_flush()
H A Dgfx_v6_0.c2304 amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST); in gfx_v6_0_ring_emit_vm_flush()
H A Dgfx_v7_0.c3156 amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST); in gfx_v7_0_ring_emit_vm_flush()
H A Dgfx_v8_0.c6233 amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST); in gfx_v8_0_ring_emit_vm_flush()
/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_0_d.h559 #define mmVM_INVALIDATE_REQUEST 0x51e macro
H A Dgmc_8_2_d.h617 #define mmVM_INVALIDATE_REQUEST 0x51e macro
H A Dgmc_6_0_d.h1252 #define mmVM_INVALIDATE_REQUEST 0x051E macro
H A Dgmc_7_1_d.h592 #define mmVM_INVALIDATE_REQUEST 0x51e macro
H A Dgmc_8_1_d.h615 #define mmVM_INVALIDATE_REQUEST 0x51e macro