Home
last modified time | relevance | path

Searched refs:mmVGA_MEM_WRITE_PAGE_ADDR (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h4391 #define mmVGA_MEM_WRITE_PAGE_ADDR 0x0012 macro
H A Ddce_8_0_d.h5159 #define mmVGA_MEM_WRITE_PAGE_ADDR 0x12 macro
H A Ddce_10_0_d.h6042 #define mmVGA_MEM_WRITE_PAGE_ADDR 0x12 macro
H A Ddce_11_0_d.h6119 #define mmVGA_MEM_WRITE_PAGE_ADDR 0x12 macro
H A Ddce_11_2_d.h7793 #define mmVGA_MEM_WRITE_PAGE_ADDR 0x12 macro
H A Ddce_12_0_offset.h550 #define mmVGA_MEM_WRITE_PAGE_ADDR macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_offset.h13 #define mmVGA_MEM_WRITE_PAGE_ADDR macro
H A Ddcn_3_0_0_offset.h9 #define mmVGA_MEM_WRITE_PAGE_ADDR macro
10 #define mmVGA_MEM_WRITE_PAGE_ADDR macro
H A Ddcn_3_0_1_offset.h28 #define mmVGA_MEM_WRITE_PAGE_ADDR macro
H A Ddcn_1_0_offset.h76 #define mmVGA_MEM_WRITE_PAGE_ADDR macro
H A Ddcn_2_1_0_offset.h28 #define mmVGA_MEM_WRITE_PAGE_ADDR macro
H A Ddcn_3_0_2_offset.h28 #define mmVGA_MEM_WRITE_PAGE_ADDR macro
H A Ddcn_2_0_0_offset.h28 #define mmVGA_MEM_WRITE_PAGE_ADDR macro