Home
last modified time | relevance | path

Searched refs:mmVCE_VCPU_CACHE_SIZE1 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_1_0_d.h60 #define mmVCE_VCPU_CACHE_SIZE1 0x800C macro
H A Dvce_2_0_d.h32 #define mmVCE_VCPU_CACHE_SIZE1 0x800c macro
H A Dvce_3_0_d.h32 #define mmVCE_VCPU_CACHE_SIZE1 0x800c macro
H A Dvce_4_0_offset.h38 #define mmVCE_VCPU_CACHE_SIZE1 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v4_0.c291 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_SIZE1), size); in vce_v4_0_sriov_start()
672 WREG32(SOC15_REG_OFFSET(VCE, 0, mmVCE_VCPU_CACHE_SIZE1), size); in vce_v4_0_mc_resume()
H A Dvce_v3_0.c580 WREG32(mmVCE_VCPU_CACHE_SIZE1, size); in vce_v3_0_mc_resume()
589 WREG32(mmVCE_VCPU_CACHE_SIZE1, size); in vce_v3_0_mc_resume()