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Searched refs:mmVCE_VCPU_CACHE_SIZE0 (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_2_0_d.h30 #define mmVCE_VCPU_CACHE_SIZE0 0x800a macro
H A Dvce_3_0_d.h30 #define mmVCE_VCPU_CACHE_SIZE0 0x800a macro
H A Dvce_4_0_offset.h34 #define mmVCE_VCPU_CACHE_SIZE0 … macro