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Searched refs:mmVCE_UENC_DMA_DCLK_CTRL (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_1_0_d.h54 #define mmVCE_UENC_DMA_DCLK_CTRL 0x8250 macro
H A Dvce_2_0_d.h49 #define mmVCE_UENC_DMA_DCLK_CTRL 0x8390 macro
H A Dvce_3_0_d.h54 #define mmVCE_UENC_DMA_DCLK_CTRL 0x8390 macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v3_0.c201 data = RREG32(mmVCE_UENC_DMA_DCLK_CTRL); in vce_v3_0_set_vce_sw_clock_gating()
206 WREG32(mmVCE_UENC_DMA_DCLK_CTRL, data); in vce_v3_0_set_vce_sw_clock_gating()
225 data = RREG32(mmVCE_UENC_DMA_DCLK_CTRL); in vce_v3_0_set_vce_sw_clock_gating()
230 WREG32(mmVCE_UENC_DMA_DCLK_CTRL, data); in vce_v3_0_set_vce_sw_clock_gating()