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Searched refs:mmVCE_SOFT_RESET (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_1_0_d.h48 #define mmVCE_SOFT_RESET 0x8048 macro
H A Dvce_2_0_d.h35 #define mmVCE_SOFT_RESET 0x8048 macro
H A Dvce_3_0_d.h35 #define mmVCE_SOFT_RESET 0x8048 macro
H A Dvce_4_0_offset.h68 #define mmVCE_SOFT_RESET … macro
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v2_0.c130 WREG32_P(mmVCE_SOFT_RESET, in vce_v2_0_firmware_loaded()
134 WREG32_P(mmVCE_SOFT_RESET, 0, in vce_v2_0_firmware_loaded()
303 WREG32_P(mmVCE_SOFT_RESET, 1, ~0x1); in vce_v2_0_stop()
H A Dvce_v4_0.c140 WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SOFT_RESET), in vce_v4_0_firmware_loaded()
144 WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SOFT_RESET), 0, in vce_v4_0_firmware_loaded()
309 MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(SOC15_REG_OFFSET(VCE, 0, mmVCE_SOFT_RESET), in vce_v4_0_sriov_start()
371 WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SOFT_RESET), 0, in vce_v4_0_start()
395 WREG32_P(SOC15_REG_OFFSET(VCE, 0, mmVCE_SOFT_RESET), in vce_v4_0_stop()