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Searched refs:mmVCE_CLOCK_GATING_A (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvce_v1_0.c162 tmp = RREG32(mmVCE_CLOCK_GATING_A); in vce_v1_0_init_cg()
164 WREG32(mmVCE_CLOCK_GATING_A, tmp); in vce_v1_0_init_cg()
306 WREG32_P(mmVCE_CLOCK_GATING_A, 0, ~(1 << 16)); in vce_v1_0_mc_resume()
485 tmp = RREG32(mmVCE_CLOCK_GATING_A); in vce_v1_0_enable_mgcg()
487 WREG32(mmVCE_CLOCK_GATING_A, tmp); in vce_v1_0_enable_mgcg()
498 tmp = RREG32(mmVCE_CLOCK_GATING_A); in vce_v1_0_enable_mgcg()
500 WREG32(mmVCE_CLOCK_GATING_A, tmp); in vce_v1_0_enable_mgcg()
H A Dvce_v2_0.c156 tmp = RREG32(mmVCE_CLOCK_GATING_A); in vce_v2_0_init_cg()
160 WREG32(mmVCE_CLOCK_GATING_A, tmp); in vce_v2_0_init_cg()
177 WREG32_P(mmVCE_CLOCK_GATING_A, 0, ~(1 << 16)); in vce_v2_0_mc_resume()
H A Dvce_v3_0.c558 WREG32_P(mmVCE_CLOCK_GATING_A, 0, ~(1 << 16)); in vce_v3_0_mc_resume()
722 uint32_t data = RREG32(mmVCE_CLOCK_GATING_A); in vce_v3_0_set_clockgating_state()
725 WREG32(mmVCE_CLOCK_GATING_A, data); in vce_v3_0_set_clockgating_state()
790 data = RREG32(mmVCE_CLOCK_GATING_A); in vce_v3_0_get_clockgating_state()
/linux/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_2_0_d.h47 #define mmVCE_CLOCK_GATING_A 0x80be macro
H A Dvce_3_0_d.h47 #define mmVCE_CLOCK_GATING_A 0x80be macro
H A Dvce_4_0_offset.h92 #define mmVCE_CLOCK_GATING_A … macro